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/drivers/gpu/drm/omapdrm/
Dtcm.h52 struct tcm_pt p0; member
228 slice->p0.y != slice->p1.y && in tcm_slice()
229 (slice->p0.x || (slice->p1.x != slice->tcm->width - 1))) { in tcm_slice()
232 slice->p1.y = (slice->p0.x) ? slice->p0.y : slice->p1.y - 1; in tcm_slice()
234 parent->p0.x = 0; in tcm_slice()
235 parent->p0.y = slice->p1.y + 1; in tcm_slice()
249 area->p0.y <= area->p1.y && in tcm_area_is_valid()
252 area->p0.x < area->tcm->width && in tcm_area_is_valid()
253 area->p0.x + area->p0.y * area->tcm->width <= in tcm_area_is_valid()
257 area->p0.x <= area->p1.x)); in tcm_area_is_valid()
[all …]
Dtcm-sita.c163 area->p0.x = pos % tcm->width; in sita_reserve_1d()
164 area->p0.y = pos / tcm->width; in sita_reserve_1d()
185 area->p0.x = pos % tcm->width; in sita_reserve_2d()
186 area->p0.y = pos / tcm->width; in sita_reserve_2d()
187 area->p1.x = area->p0.x + w - 1; in sita_reserve_2d()
188 area->p1.y = area->p0.y + h - 1; in sita_reserve_2d()
205 pos = area->p0.x + area->p0.y * tcm->width; in sita_free()
207 w = area->p1.x - area->p0.x + 1; in sita_free()
208 h = area->p1.y - area->p0.y + 1; in sita_free()
Domap_dmm_tiler.c487 .x0 = slice.p0.x, .y0 = slice.p0.y, in fill()
672 block->area.p0.x * geom[block->fmt].slot_w, in tiler_ssptr()
673 block->area.p0.y * geom[block->fmt].slot_h); in tiler_ssptr()
679 struct tcm_pt *p = &block->area.p0; in tiler_tsptr()
1004 for (y = a->p0.y / ydiv; y <= a->p1.y / ydiv; y++) in fill_map()
1005 for (x = a->p0.x / xdiv; x <= a->p1.x / xdiv; x++) in fill_map()
1041 if (a->p0.y + 1 < a->p1.y) { in map_1d_info()
1042 text_map(map, xdiv, nice, (a->p0.y + a->p1.y) / 2 / ydiv, 0, in map_1d_info()
1044 } else if (a->p0.y < a->p1.y) { in map_1d_info()
1045 if (strlen(nice) < map_width(xdiv, a->p0.x, 256 - 1)) in map_1d_info()
[all …]
/drivers/scsi/qla4xxx/
Dql4_dbg.c106 offsetof(struct isp_reg, u2.isp4022.p0.ext_hw_conf), in qla4xxx_dump_registers()
107 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf)); in qla4xxx_dump_registers()
109 offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl), in qla4xxx_dump_registers()
110 readw(&ha->reg->u2.isp4022.p0.port_ctrl)); in qla4xxx_dump_registers()
112 offsetof(struct isp_reg, u2.isp4022.p0.port_status), in qla4xxx_dump_registers()
113 readw(&ha->reg->u2.isp4022.p0.port_status)); in qla4xxx_dump_registers()
115 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_out), in qla4xxx_dump_registers()
116 readw(&ha->reg->u2.isp4022.p0.gp_out)); in qla4xxx_dump_registers()
118 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in), in qla4xxx_dump_registers()
119 readw(&ha->reg->u2.isp4022.p0.gp_in)); in qla4xxx_dump_registers()
[all …]
Dql4_def.h945 &ha->reg->u2.isp4022.p0.ext_hw_conf); in isp_ext_hw_conf()
952 &ha->reg->u2.isp4022.p0.port_status); in isp_port_status()
959 &ha->reg->u2.isp4022.p0.port_ctrl); in isp_port_ctrl()
966 &ha->reg->u2.isp4022.p0.port_err_status); in isp_port_error_status()
973 &ha->reg->u2.isp4022.p0.gp_out); in isp_gp_out()
/drivers/media/usb/pwc/
Dpwc-dec23.c93 unsigned char *p0, *p8; in build_table_color() local
98 p0 = p0004[compression_mode]; in build_table_color()
102 for (j = 0; j < 8; j++, r++, p0 += 128) { in build_table_color()
126 p0[k + 0x00] = (1 * pw) + 0x80; in build_table_color()
127 p0[k + 0x10] = (2 * pw) + 0x80; in build_table_color()
128 p0[k + 0x20] = (3 * pw) + 0x80; in build_table_color()
129 p0[k + 0x30] = (4 * pw) + 0x80; in build_table_color()
130 p0[k + 0x40] = (-1 * pw) + 0x80; in build_table_color()
131 p0[k + 0x50] = (-2 * pw) + 0x80; in build_table_color()
132 p0[k + 0x60] = (-3 * pw) + 0x80; in build_table_color()
[all …]
/drivers/gpu/drm/msm/dp/
Ddp_parser.c67 dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET; in dp_parser_ctrl_res()
68 dss->p0.len = DP_DEFAULT_P0_SIZE; in dp_parser_ctrl_res()
80 dss->p0.base = dp_ioremap(pdev, 3, &dss->p0.len); in dp_parser_ctrl_res()
81 if (IS_ERR(dss->p0.base)) { in dp_parser_ctrl_res()
82 DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base); in dp_parser_ctrl_res()
83 return PTR_ERR(dss->p0.base); in dp_parser_ctrl_res()
Ddp_catalog.c68 msm_disp_snapshot_add_block(disp_state, dss->p0.len, dss->p0.base, "dp_p0"); in dp_catalog_snapshot()
108 writel(data, catalog->io->dp_controller.p0.base + offset); in dp_write_p0()
118 return readl_relaxed(catalog->io->dp_controller.p0.base + offset); in dp_read_p0()
295 dump_regs(io->p0.base, io->p0.len); in dp_catalog_dump_regs()
Ddp_parser.h36 struct dss_io_region p0; member
/drivers/parisc/
Deisa_enumerator.c324 int p0; in parse_slot_config() local
345 p0 = pos; in parse_slot_config()
350 pos = p0 + function_len; in parse_slot_config()
357 pos = p0 + function_len; in parse_slot_config()
395 if (p0 + function_len < pos) { in parse_slot_config()
398 num_func, pos-p0, function_len); in parse_slot_config()
402 pos = p0 + function_len; in parse_slot_config()
/drivers/gpu/drm/vc4/
Dvc4_validate.c579 uint32_t p0 = *(uint32_t *)(uniform_data_u + sample->p_offset[0]); in reloc_tex() local
586 uint32_t offset = p0 & VC4_TEX_P0_OFFSET_MASK; in reloc_tex()
587 uint32_t miplevels = VC4_GET_FIELD(p0, VC4_TEX_P0_MIPLVLS); in reloc_tex()
600 uint32_t remaining_size = tex->base.size - p0; in reloc_tex()
602 if (p0 > tex->base.size - 4) { in reloc_tex()
611 *validated_p0 = tex->dma_addr + p0; in reloc_tex()
620 if (p0 & VC4_TEX_P0_CMMODE_MASK) { in reloc_tex()
639 type = (VC4_GET_FIELD(p0, VC4_TEX_P0_TYPE) | in reloc_tex()
739 *validated_p0 = tex->dma_addr + p0; in reloc_tex()
748 DRM_INFO("Texture p0 at %d: 0x%08x\n", sample->p_offset[0], p0); in reloc_tex()
/drivers/tty/vt/
Dconmakehash.c31 static int getunicode(char **p0) in getunicode() argument
33 char *p = *p0; in getunicode()
41 *p0 = p+6; in getunicode()
/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.c1428 unsigned int *p0 /* out */, in skl_wrpll_get_multipliers() argument
1437 *p0 = 2; in skl_wrpll_get_multipliers()
1441 *p0 = 2; in skl_wrpll_get_multipliers()
1445 *p0 = 3; in skl_wrpll_get_multipliers()
1449 *p0 = 7; in skl_wrpll_get_multipliers()
1454 *p0 = 3; in skl_wrpll_get_multipliers()
1458 *p0 = p; in skl_wrpll_get_multipliers()
1462 *p0 = 3; in skl_wrpll_get_multipliers()
1466 *p0 = 7; in skl_wrpll_get_multipliers()
1470 *p0 = 7; in skl_wrpll_get_multipliers()
[all …]
/drivers/video/fbdev/sis/
Dsis_accel.h226 #define SiS300SetupMONOPAT(p0,p1) \ argument
228 MMIO_OUT32(ivideo->mmio_vbase, BR(11), p0);\
352 #define SiS310SetupMONOPAT(p0,p1) \ argument
354 MMIO_OUT32(ivideo->mmio_vbase, MONO_MASK, p0);\
/drivers/gpio/
Dgpio-crystalcove.c280 unsigned int p0, p1; in crystalcove_gpio_irq_handler() local
284 if (regmap_read(cg->regmap, GPIO0IRQ, &p0) || in crystalcove_gpio_irq_handler()
288 regmap_write(cg->regmap, GPIO0IRQ, p0); in crystalcove_gpio_irq_handler()
291 pending = p0 | p1 << 8; in crystalcove_gpio_irq_handler()
/drivers/net/wireless/ath/
Ddfs_pri_detector.c102 struct pulse_elem *p, *p0; in pool_deregister_ref() local
104 list_for_each_entry_safe(p, p0, &pulse_pool, head) { in pool_deregister_ref()
361 struct pulse_elem *p, *p0; in pri_detector_reset() local
366 list_for_each_entry_safe(p, p0, &pde->pulses, head) { in pri_detector_reset()
/drivers/net/wireless/marvell/libertas/
Dcmd.h113 int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0,
116 int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1,
Ddebugfs.c859 char *p0; in lbs_debugfs_write() local
871 p0 = pdata; in lbs_debugfs_write()
874 p = strstr(p0, d[i].name); in lbs_debugfs_write()
880 p0 = p1++; in lbs_debugfs_write()
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Didle.fuc53 bset $flags $p0
82 sleep $p0
/drivers/video/fbdev/
Dcontrolfb.c384 unsigned long p0, p1, p2, k, l, m, n, min; in calc_clock_params() local
391 p0 = 0; in calc_clock_params()
400 p0 = k; in calc_clock_params()
405 if (!p0 || !p1) in calc_clock_params()
408 param[0] = p0; in calc_clock_params()
/drivers/net/wireless/broadcom/brcm80211/brcmutil/
Dutils.c297 void brcmu_prpkt(const char *msg, struct sk_buff *p0) in brcmu_prpkt() argument
304 for (p = p0; p; p = p->next) in brcmu_prpkt()
/drivers/clk/qcom/
Dclk-rcg2.c864 struct clk_hw *xo, *p0, *p1, *p2; in clk_gfx3d_determine_rate() local
869 p0 = cgfx->hws[0]; in clk_gfx3d_determine_rate()
877 if (WARN_ON(!p0 || !p1 || !p2)) in clk_gfx3d_determine_rate()
892 p0_rate = clk_hw_get_rate(p0); in clk_gfx3d_determine_rate()
896 req->best_parent_hw = p0; in clk_gfx3d_determine_rate()
900 if (req->best_parent_hw == p0) { in clk_gfx3d_determine_rate()
/drivers/hwmon/
Dcorsair-psu.c148 static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data) in corsairpsu_usb_cmd() argument
154 priv->cmd_buffer[0] = p0; in corsairpsu_usb_cmd()
174 if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1]) in corsairpsu_usb_cmd()
/drivers/media/platform/renesas/vsp1/
Dvsp1_sru.c44 #define VI6_SRU_CTRL0_PARAMS(p0, p1) \ argument
45 (((p0) << VI6_SRU_CTRL0_PARAM0_SHIFT) | \
/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Ddma.h90 struct sk_buff *p0);

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