| /drivers/misc/cxl/ |
| D | hcalls.c | 206 u64 p1, u64 p2, u64 p3, u64 p4, u64 *out) in cxl_h_control_function() argument
211 CXL_H9_WAIT_UNTIL_DONE(rc, retbuf, H_CONTROL_CA_FUNCTION, unit_address, op, p1, p2, p3, p4); in cxl_h_control_function()
213 unit_address, OP_STR_AFU(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_function()
214 trace_cxl_hcall_control_function(unit_address, OP_STR_AFU(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_function()
479 u64 p1, u64 p2, u64 p3, u64 p4, u64 *out) in cxl_h_control_facility() argument
484 CXL_H9_WAIT_UNTIL_DONE(rc, retbuf, H_CONTROL_CA_FACILITY, unit_address, op, p1, p2, p3, p4); in cxl_h_control_facility()
486 unit_address, OP_STR_CONTROL_ADAPTER(op), p1, p2, p3, p4, retbuf[0], rc); in cxl_h_control_facility()
487 …trace_cxl_hcall_control_facility(unit_address, OP_STR_CONTROL_ADAPTER(op), p1, p2, p3, p4, retbuf[… in cxl_h_control_facility()
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| D | trace.h | 518 u64 p4, unsigned long r4, long rc),
520 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc),
528 __field(u64, p4)
539 __entry->p4 = p4;
550 __entry->p4,
599 u64 p4, unsigned long r4, long rc),
600 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
647 u64 p4, unsigned long r4, long rc),
648 TP_ARGS(unit_address, fct, p1, p2, p3, p4, r4, rc)
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| /drivers/media/i2c/ |
| D | mt9t112.c | 277 int m, n, p1, p2, p3, p4, p5, p6, p7; in mt9t112_clock_info() local
291 p4 = n & 0x000f; in mt9t112_clock_info()
327 clk = vco / (p4 + 1); in mt9t112_clock_info()
371 u8 m, u8 n, u8 p1, u8 p2, u8 p3, u8 p4, in mt9t112_set_pll_dividers() argument
387 ((p4 & 0x0F) << 0); in mt9t112_set_pll_dividers()
411 priv->info->divider.p3, priv->info->divider.p4, in mt9t112_init_pll()
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| /drivers/scsi/aacraid/ |
| D | sa.c | 153 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in sa_sync_cmd() argument
168 sa_writel(dev, Mailbox4, p4); in sa_sync_cmd()
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| D | rx.c | 163 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in rx_sync_cmd() argument
178 writel(p4, &dev->IndexRegs->Mailbox[4]); in rx_sync_cmd()
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| D | src.c | 210 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, in src_sync_cmd() argument
227 writel(p4, &dev->IndexRegs->Mailbox[4]); in src_sync_cmd()
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| D | aacraid.h | 906 …int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5,…
1695 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ argument
1696 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
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| /drivers/media/dvb-frontends/ |
| D | tc90522.c | 258 u32 p, p4; in tc90522s_get_frontend() local
270 p4 = cndat * cndat; in tc90522s_get_frontend()
271 cn = div64_s64(-16346LL * p4 * p, 10) >> 35; in tc90522s_get_frontend()
272 cn += (14341LL * p4) >> 21; in tc90522s_get_frontend()
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| /drivers/net/wireless/marvell/libertas/ |
| D | README | 39 version: COMM-USB8388-318.p4
102 echo "p1 p2 p3 p4 p5 p6" > sleepparams: writes the sleepclock configuration.
108 p4 is Control periodic calibration (0-2)
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| D | debugfs.c | 62 int p1, p2, p3, p4, p5, p6; in lbs_sleepparams_write() local
69 ret = sscanf(buf, "%d %d %d %d %d %d", &p1, &p2, &p3, &p4, &p5, &p6); in lbs_sleepparams_write()
77 sp.sp_calcontrol = p4; in lbs_sleepparams_write()
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| /drivers/gpu/drm/tiny/ |
| D | repaper.c | 210 u8 p1, p2, p3, p4; in repaper_even_pixels() local
236 p4 = (pixels >> 0) & 0x03; in repaper_even_pixels()
237 pixels = (p1 << 0) | (p2 << 2) | (p3 << 4) | (p4 << 6); in repaper_even_pixels()
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| /drivers/cpufreq/ |
| D | Makefile | 53 obj-$(CONFIG_X86_P4_CLOCKMOD) += p4-clockmod.o
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| D | Kconfig.x86 | 258 module will be called p4-clockmod.
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| /drivers/iio/adc/ |
| D | at91-sama5d2_adc.c | 482 u32 p4; member
1915 div2 = DIV_ROUND_CLOSEST_ULL((u64)clb->p4, AT91_ADC_TS_VTEMP_DT); in at91_adc_read_temp()
2306 clb->p4 = buf[AT91_ADC_TS_CLB_IDX_P4]; in at91_adc_temp_sensor_init()
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