| /drivers/pinctrl/meson/ |
| D | pinctrl-meson.c | 73 static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin, in meson_get_bank() argument
78 for (i = 0; i < pc->data->num_banks; i++) { in meson_get_bank()
79 if (pin >= pc->data->banks[i].first && in meson_get_bank()
80 pin <= pc->data->banks[i].last) { in meson_get_bank()
81 *bank = &pc->data->banks[i]; in meson_get_bank()
111 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); in meson_get_groups_count() local
113 return pc->data->num_groups; in meson_get_groups_count()
119 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); in meson_get_group_name() local
121 return pc->data->groups[selector].name; in meson_get_group_name()
127 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); in meson_get_group_pins() local
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| D | pinctrl-meson8-pmx.c | 32 static void meson8_pmx_disable_other_groups(struct meson_pinctrl *pc, in meson8_pmx_disable_other_groups() argument
39 for (i = 0; i < pc->data->num_groups; i++) { in meson8_pmx_disable_other_groups()
40 group = &pc->data->groups[i]; in meson8_pmx_disable_other_groups()
48 regmap_update_bits(pc->reg_mux, in meson8_pmx_disable_other_groups()
59 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); in meson8_pmx_set_mux() local
60 struct meson_pmx_func *func = &pc->data->funcs[func_num]; in meson8_pmx_set_mux()
61 struct meson_pmx_group *group = &pc->data->groups[group_num]; in meson8_pmx_set_mux()
66 dev_dbg(pc->dev, "enable function %s, group %s\n", func->name, in meson8_pmx_set_mux()
74 meson8_pmx_disable_other_groups(pc, group->pins[i], group_num); in meson8_pmx_set_mux()
78 ret = regmap_update_bits(pc->reg_mux, pmx_data->reg * 4, in meson8_pmx_set_mux()
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| D | pinctrl-meson-axg-pmx.c | 29 static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc, in meson_axg_pmx_get_bank() argument
34 struct meson_axg_pmx_data *pmx = pc->data->pmx_data; in meson_axg_pmx_get_bank()
60 static int meson_axg_pmx_update_function(struct meson_pinctrl *pc, in meson_axg_pmx_update_function() argument
68 ret = meson_axg_pmx_get_bank(pc, pin, &bank); in meson_axg_pmx_update_function()
74 ret = regmap_update_bits(pc->reg_mux, reg << 2, in meson_axg_pmx_update_function()
85 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); in meson_axg_pmx_set_mux() local
86 struct meson_pmx_func *func = &pc->data->funcs[func_num]; in meson_axg_pmx_set_mux()
87 struct meson_pmx_group *group = &pc->data->groups[group_num]; in meson_axg_pmx_set_mux()
91 dev_dbg(pc->dev, "enable function %s, group %s\n", func->name, in meson_axg_pmx_set_mux()
95 ret = meson_axg_pmx_update_function(pc, group->pins[i], in meson_axg_pmx_set_mux()
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| /drivers/bcma/ |
| D | driver_pci.c | 20 u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address) in bcma_pcie_read() argument
22 pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_ADDR, address); in bcma_pcie_read()
23 pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_ADDR); in bcma_pcie_read()
24 return pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_DATA); in bcma_pcie_read()
27 static void bcma_pcie_write(struct bcma_drv_pci *pc, u32 address, u32 data) in bcma_pcie_write() argument
29 pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_ADDR, address); in bcma_pcie_write()
30 pcicore_read32(pc, BCMA_CORE_PCI_PCIEIND_ADDR); in bcma_pcie_write()
31 pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); in bcma_pcie_write()
34 static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) in bcma_pcie_mdio_set_phy() argument
47 pcicore_write32(pc, BCMA_CORE_PCI_MDIO_DATA, v); in bcma_pcie_mdio_set_phy()
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| D | driver_pci_host.c | 28 bool bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc) in bcma_core_pci_is_in_hostmode() argument
30 struct bcma_bus *bus = pc->core->bus; in bcma_core_pci_is_in_hostmode()
39 bcma_core_enable(pc->core, 0); in bcma_core_pci_is_in_hostmode()
41 return !mips_busprobe32(tmp, pc->core->io_addr); in bcma_core_pci_is_in_hostmode()
44 static u32 bcma_pcie_read_config(struct bcma_drv_pci *pc, u32 address) in bcma_pcie_read_config() argument
46 pcicore_write32(pc, BCMA_CORE_PCI_CONFIG_ADDR, address); in bcma_pcie_read_config()
47 pcicore_read32(pc, BCMA_CORE_PCI_CONFIG_ADDR); in bcma_pcie_read_config()
48 return pcicore_read32(pc, BCMA_CORE_PCI_CONFIG_DATA); in bcma_pcie_read_config()
51 static void bcma_pcie_write_config(struct bcma_drv_pci *pc, u32 address, in bcma_pcie_write_config() argument
54 pcicore_write32(pc, BCMA_CORE_PCI_CONFIG_ADDR, address); in bcma_pcie_write_config()
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| D | bcma_private.h | 123 u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address);
124 void bcma_core_pci_early_init(struct bcma_drv_pci *pc);
125 void bcma_core_pci_init(struct bcma_drv_pci *pc);
126 void bcma_core_pci_up(struct bcma_drv_pci *pc);
127 void bcma_core_pci_down(struct bcma_drv_pci *pc);
129 static inline void bcma_core_pci_early_init(struct bcma_drv_pci *pc) in bcma_core_pci_early_init() argument
131 WARN_ON(pc->core->bus->hosttype == BCMA_HOSTTYPE_PCI); in bcma_core_pci_early_init()
133 static inline void bcma_core_pci_init(struct bcma_drv_pci *pc) in bcma_core_pci_init() argument
136 WARN_ON(pc->core->bus->hosttype == BCMA_HOSTTYPE_PCI); in bcma_core_pci_init()
155 bool bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc);
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| /drivers/pwm/ |
| D | pwm-sti.c | 123 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period, in sti_pwm_get_prescale() argument
126 struct sti_pwm_compat_data *cdata = pc->cdata; in sti_pwm_get_prescale()
131 clk_rate = clk_get_rate(pc->pwm_clk); in sti_pwm_get_prescale()
133 dev_err(pc->dev, "failed to get clock rate\n"); in sti_pwm_get_prescale()
167 struct sti_pwm_chip *pc = to_sti_pwmchip(chip); in sti_pwm_config() local
168 struct sti_pwm_compat_data *cdata = pc->cdata; in sti_pwm_config()
170 struct pwm_device *cur = pc->cur; in sti_pwm_config()
171 struct device *dev = pc->dev; in sti_pwm_config()
175 ncfg = hweight_long(pc->configured); in sti_pwm_config()
196 ret = clk_enable(pc->pwm_clk); in sti_pwm_config()
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| D | pwm-rockchip.c | 64 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); in rockchip_pwm_get_state() local
65 u32 enable_conf = pc->data->enable_conf; in rockchip_pwm_get_state()
71 ret = clk_enable(pc->pclk); in rockchip_pwm_get_state()
75 ret = clk_enable(pc->clk); in rockchip_pwm_get_state()
79 clk_rate = clk_get_rate(pc->clk); in rockchip_pwm_get_state()
81 tmp = readl_relaxed(pc->base + pc->data->regs.period); in rockchip_pwm_get_state()
82 tmp *= pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
85 tmp = readl_relaxed(pc->base + pc->data->regs.duty); in rockchip_pwm_get_state()
86 tmp *= pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
89 val = readl_relaxed(pc->base + pc->data->regs.ctrl); in rockchip_pwm_get_state()
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| D | pwm-tiehrpwm.c | 181 static void configure_polarity(struct ehrpwm_pwm_chip *pc, int chan) in configure_polarity() argument
196 if (pc->polarity[chan] == PWM_POLARITY_INVERSED) in configure_polarity()
204 if (pc->polarity[chan] == PWM_POLARITY_INVERSED) in configure_polarity()
211 ehrpwm_modify(pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); in configure_polarity()
221 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); in ehrpwm_pwm_config() local
230 c = pc->clk_rate; in ehrpwm_pwm_config()
239 c = pc->clk_rate; in ehrpwm_pwm_config()
250 if (pc->period_cycles[i] && in ehrpwm_pwm_config()
251 (pc->period_cycles[i] != period_cycles)) { in ehrpwm_pwm_config()
266 pc->period_cycles[pwm->hwpwm] = period_cycles; in ehrpwm_pwm_config()
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| D | pwm-tiecap.c | 53 struct ecap_pwm_chip *pc = to_ecap_pwm_chip(chip); in ecap_pwm_config() local
58 c = pc->clk_rate; in ecap_pwm_config()
67 c = pc->clk_rate; in ecap_pwm_config()
73 pm_runtime_get_sync(pc->chip.dev); in ecap_pwm_config()
75 value = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
80 writew(value, pc->mmio_base + ECCTL2); in ecap_pwm_config()
84 writel(duty_cycles, pc->mmio_base + CAP2); in ecap_pwm_config()
85 writel(period_cycles, pc->mmio_base + CAP1); in ecap_pwm_config()
92 writel(duty_cycles, pc->mmio_base + CAP4); in ecap_pwm_config()
93 writel(period_cycles, pc->mmio_base + CAP3); in ecap_pwm_config()
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| D | pwm-tegra.c | 88 static inline u32 pwm_readl(struct tegra_pwm_chip *pc, unsigned int offset) in pwm_readl() argument
90 return readl(pc->regs + (offset << 4)); in pwm_readl()
93 static inline void pwm_writel(struct tegra_pwm_chip *pc, unsigned int offset, u32 value) in pwm_writel() argument
95 writel(value, pc->regs + (offset << 4)); in pwm_writel()
101 struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip); in tegra_pwm_config() local
120 if (period_ns < pc->min_period_ns) in tegra_pwm_config()
136 if (pc->soc->num_channels == 1) { in tegra_pwm_config()
151 if (required_clk_rate > clk_round_rate(pc->clk, required_clk_rate)) in tegra_pwm_config()
162 err = dev_pm_opp_set_rate(pc->dev, required_clk_rate); in tegra_pwm_config()
167 pc->clk_rate = clk_get_rate(pc->clk); in tegra_pwm_config()
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| D | pwm-mediatek.c | 75 struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); in pwm_mediatek_clk_enable() local
78 ret = clk_prepare_enable(pc->clk_top); in pwm_mediatek_clk_enable()
82 ret = clk_prepare_enable(pc->clk_main); in pwm_mediatek_clk_enable()
86 ret = clk_prepare_enable(pc->clk_pwms[pwm->hwpwm]); in pwm_mediatek_clk_enable()
93 clk_disable_unprepare(pc->clk_main); in pwm_mediatek_clk_enable()
95 clk_disable_unprepare(pc->clk_top); in pwm_mediatek_clk_enable()
103 struct pwm_mediatek_chip *pc = to_pwm_mediatek_chip(chip); in pwm_mediatek_clk_disable() local
105 clk_disable_unprepare(pc->clk_pwms[pwm->hwpwm]); in pwm_mediatek_clk_disable()
106 clk_disable_unprepare(pc->clk_main); in pwm_mediatek_clk_disable()
107 clk_disable_unprepare(pc->clk_top); in pwm_mediatek_clk_disable()
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| D | pwm-spear.c | 80 struct spear_pwm_chip *pc = to_spear_pwm_chip(chip); in spear_pwm_config() local
95 clk_rate = clk_get_rate(pc->clk); in spear_pwm_config()
124 ret = clk_enable(pc->clk); in spear_pwm_config()
128 spear_pwm_writel(pc, pwm->hwpwm, PWMCR, in spear_pwm_config()
130 spear_pwm_writel(pc, pwm->hwpwm, PWMDCR, dc); in spear_pwm_config()
131 spear_pwm_writel(pc, pwm->hwpwm, PWMPCR, pv); in spear_pwm_config()
132 clk_disable(pc->clk); in spear_pwm_config()
139 struct spear_pwm_chip *pc = to_spear_pwm_chip(chip); in spear_pwm_enable() local
143 rc = clk_enable(pc->clk); in spear_pwm_enable()
147 val = spear_pwm_readl(pc, pwm->hwpwm, PWMCR); in spear_pwm_enable()
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| D | pwm-bcm2835.c | 40 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip); in bcm2835_pwm_request() local
43 value = readl(pc->base + PWM_CONTROL); in bcm2835_pwm_request()
46 writel(value, pc->base + PWM_CONTROL); in bcm2835_pwm_request()
53 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip); in bcm2835_pwm_free() local
56 value = readl(pc->base + PWM_CONTROL); in bcm2835_pwm_free()
58 writel(value, pc->base + PWM_CONTROL); in bcm2835_pwm_free()
65 struct bcm2835_pwm *pc = to_bcm2835_pwm(chip); in bcm2835_pwm_apply() local
66 unsigned long rate = clk_get_rate(pc->clk); in bcm2835_pwm_apply()
73 dev_err(pc->dev, "failed to get clock rate\n"); in bcm2835_pwm_apply()
103 writel(period_cycles, pc->base + PERIOD(pwm->hwpwm)); in bcm2835_pwm_apply()
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| D | pwm-pxa.c | 63 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); in pxa_pwm_config() local
71 c = clk_get_rate(pc->clk); in pxa_pwm_config()
92 rc = clk_prepare_enable(pc->clk); in pxa_pwm_config()
96 writel(prescale, pc->mmio_base + offset + PWMCR); in pxa_pwm_config()
97 writel(dc, pc->mmio_base + offset + PWMDCR); in pxa_pwm_config()
98 writel(pv, pc->mmio_base + offset + PWMPCR); in pxa_pwm_config()
100 clk_disable_unprepare(pc->clk); in pxa_pwm_config()
106 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); in pxa_pwm_enable() local
108 return clk_prepare_enable(pc->clk); in pxa_pwm_enable()
113 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); in pxa_pwm_disable() local
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| D | pwm-intel-lgm.c | 57 struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip); in lgm_pwm_enable() local
58 struct regmap *regmap = pc->regmap; in lgm_pwm_enable()
67 struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip); in lgm_pwm_apply() local
72 if (state->polarity != PWM_POLARITY_NORMAL || state->period < pc->period) in lgm_pwm_apply()
78 duty_cycle = min_t(u64, state->duty_cycle, pc->period); in lgm_pwm_apply()
79 val = duty_cycle * LGM_PWM_MAX_DUTY_CYCLE / pc->period; in lgm_pwm_apply()
81 ret = regmap_update_bits(pc->regmap, LGM_PWM_FAN_CON0, LGM_PWM_FAN_DC_MSK, in lgm_pwm_apply()
92 struct lgm_pwm_chip *pc = to_lgm_pwm_chip(chip); in lgm_pwm_get_state() local
95 state->enabled = regmap_test_bits(pc->regmap, LGM_PWM_FAN_CON0, in lgm_pwm_get_state()
98 state->period = pc->period; /* fixed period */ in lgm_pwm_get_state()
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| /drivers/pinctrl/bcm/ |
| D | pinctrl-bcm2835.c | 247 static inline u32 bcm2835_gpio_rd(struct bcm2835_pinctrl *pc, unsigned reg) in bcm2835_gpio_rd() argument
249 return readl(pc->base + reg); in bcm2835_gpio_rd()
252 static inline void bcm2835_gpio_wr(struct bcm2835_pinctrl *pc, unsigned reg, in bcm2835_gpio_wr() argument
255 writel(val, pc->base + reg); in bcm2835_gpio_wr()
258 static inline int bcm2835_gpio_get_bit(struct bcm2835_pinctrl *pc, unsigned reg, in bcm2835_gpio_get_bit() argument
262 return (bcm2835_gpio_rd(pc, reg) >> GPIO_REG_SHIFT(bit)) & 1; in bcm2835_gpio_get_bit()
266 static inline void bcm2835_gpio_set_bit(struct bcm2835_pinctrl *pc, in bcm2835_gpio_set_bit() argument
270 bcm2835_gpio_wr(pc, reg, BIT(GPIO_REG_SHIFT(bit))); in bcm2835_gpio_set_bit()
274 struct bcm2835_pinctrl *pc, unsigned pin) in bcm2835_pinctrl_fsel_get() argument
276 u32 val = bcm2835_gpio_rd(pc, FSEL_REG(pin)); in bcm2835_pinctrl_fsel_get()
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| D | pinctrl-bcm63xx.c | 47 struct bcm63xx_pinctrl *pc) in bcm63xx_gpio_probe() argument
55 grc.regmap = pc->regs; in bcm63xx_gpio_probe()
69 struct bcm63xx_pinctrl *pc; in bcm63xx_pinctrl_probe() local
73 pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL); in bcm63xx_pinctrl_probe()
74 if (!pc) in bcm63xx_pinctrl_probe()
77 platform_set_drvdata(pdev, pc); in bcm63xx_pinctrl_probe()
79 pc->dev = dev; in bcm63xx_pinctrl_probe()
80 pc->driver_data = driver_data; in bcm63xx_pinctrl_probe()
82 pc->regs = syscon_node_to_regmap(dev->parent->of_node); in bcm63xx_pinctrl_probe()
83 if (IS_ERR(pc->regs)) in bcm63xx_pinctrl_probe()
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| /drivers/ssb/ |
| D | driver_pcicore.c | 19 static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address);
20 static void ssb_pcie_write(struct ssb_pcicore *pc, u32 address, u32 data);
21 static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address);
22 static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
26 u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset) in pcicore_read32() argument
28 return ssb_read32(pc->dev, offset); in pcicore_read32()
32 void pcicore_write32(struct ssb_pcicore *pc, u16 offset, u32 value) in pcicore_write32() argument
34 ssb_write32(pc->dev, offset, value); in pcicore_write32()
38 u16 pcicore_read16(struct ssb_pcicore *pc, u16 offset) in pcicore_read16() argument
40 return ssb_read16(pc->dev, offset); in pcicore_read16()
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| /drivers/gpu/drm/bridge/imx/ |
| D | imx8qxp-pixel-combiner.c | 64 struct imx8qxp_pc *pc; member
76 static inline u32 imx8qxp_pc_read(struct imx8qxp_pc *pc, unsigned int offset) in imx8qxp_pc_read() argument
78 return readl(pc->base + offset); in imx8qxp_pc_read()
82 imx8qxp_pc_write(struct imx8qxp_pc *pc, unsigned int offset, u32 value) in imx8qxp_pc_write() argument
84 writel(value, pc->base + offset); in imx8qxp_pc_write()
88 imx8qxp_pc_write_set(struct imx8qxp_pc *pc, unsigned int offset, u32 value) in imx8qxp_pc_write_set() argument
90 imx8qxp_pc_write(pc, offset + PC_REG_SET, value); in imx8qxp_pc_write_set()
94 imx8qxp_pc_write_clr(struct imx8qxp_pc *pc, unsigned int offset, u32 value) in imx8qxp_pc_write_clr() argument
96 imx8qxp_pc_write(pc, offset + PC_REG_CLR, value); in imx8qxp_pc_write_clr()
114 struct imx8qxp_pc *pc = ch->pc; in imx8qxp_pc_bridge_attach() local
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| /drivers/dma/mediatek/ |
| D | mtk-cqdma.c | 124 struct mtk_cqdma_pchan *pc; member
146 struct mtk_cqdma_pchan **pc; member
169 static u32 mtk_dma_read(struct mtk_cqdma_pchan *pc, u32 reg) in mtk_dma_read() argument
171 return readl(pc->base + reg); in mtk_dma_read()
174 static void mtk_dma_write(struct mtk_cqdma_pchan *pc, u32 reg, u32 val) in mtk_dma_write() argument
176 writel_relaxed(val, pc->base + reg); in mtk_dma_write()
179 static void mtk_dma_rmw(struct mtk_cqdma_pchan *pc, u32 reg, in mtk_dma_rmw() argument
184 val = mtk_dma_read(pc, reg); in mtk_dma_rmw()
187 mtk_dma_write(pc, reg, val); in mtk_dma_rmw()
190 static void mtk_dma_set(struct mtk_cqdma_pchan *pc, u32 reg, u32 val) in mtk_dma_set() argument
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| /drivers/gpu/drm/i915/gem/ |
| D | i915_gem_context.c | 195 struct i915_gem_proto_context *pc) in proto_context_close() argument
199 if (pc->pxp_wakeref) in proto_context_close()
200 intel_runtime_pm_put(&i915->runtime_pm, pc->pxp_wakeref); in proto_context_close()
201 if (pc->vm) in proto_context_close()
202 i915_vm_put(pc->vm); in proto_context_close()
203 if (pc->user_engines) { in proto_context_close()
204 for (i = 0; i < pc->num_user_engines; i++) in proto_context_close()
205 kfree(pc->user_engines[i].siblings); in proto_context_close()
206 kfree(pc->user_engines); in proto_context_close()
208 kfree(pc); in proto_context_close()
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| /drivers/gpu/drm/i915/gem/selftests/ |
| D | mock_context.c | 81 struct i915_gem_proto_context *pc; in live_context() local
86 pc = proto_context_create(i915, 0); in live_context()
87 if (IS_ERR(pc)) in live_context()
88 return ERR_CAST(pc); in live_context()
90 ctx = i915_gem_create_context(i915, pc); in live_context()
91 proto_context_close(i915, pc); in live_context()
153 struct i915_gem_proto_context *pc; in kernel_context() local
155 pc = proto_context_create(i915, 0); in kernel_context()
156 if (IS_ERR(pc)) in kernel_context()
157 return ERR_CAST(pc); in kernel_context()
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| /drivers/clk/sifive/ |
| D | sifive-prci.c | 180 struct __prci_clock *pc = clk_hw_to_prci_clock(hw); in sifive_prci_wrpll_recalc_rate() local
181 struct __prci_wrpll_data *pwd = pc->pwd; in sifive_prci_wrpll_recalc_rate()
190 struct __prci_clock *pc = clk_hw_to_prci_clock(hw); in sifive_prci_wrpll_round_rate() local
191 struct __prci_wrpll_data *pwd = pc->pwd; in sifive_prci_wrpll_round_rate()
204 struct __prci_clock *pc = clk_hw_to_prci_clock(hw); in sifive_prci_wrpll_set_rate() local
205 struct __prci_wrpll_data *pwd = pc->pwd; in sifive_prci_wrpll_set_rate()
206 struct __prci_data *pd = pc->pd; in sifive_prci_wrpll_set_rate()
225 struct __prci_clock *pc = clk_hw_to_prci_clock(hw); in sifive_clk_is_enabled() local
226 struct __prci_wrpll_data *pwd = pc->pwd; in sifive_clk_is_enabled()
227 struct __prci_data *pd = pc->pd; in sifive_clk_is_enabled()
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| /drivers/pinctrl/ |
| D | pinctrl-st.c | 203 #define pc_to_bank(pc) \ argument
204 container_of(pc, struct st_gpio_bank, pc)
315 struct st_pio_control pc; member
368 return &bank->pc; in st_get_pio_control()
382 static void st_pinconf_set_config(struct st_pio_control *pc, in st_pinconf_set_config() argument
385 struct regmap_field *output_enable = pc->oe; in st_pinconf_set_config()
386 struct regmap_field *pull_up = pc->pu; in st_pinconf_set_config()
387 struct regmap_field *open_drain = pc->od; in st_pinconf_set_config()
416 static void st_pctl_set_function(struct st_pio_control *pc, in st_pctl_set_function() argument
419 struct regmap_field *alt = pc->alt; in st_pctl_set_function()
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