| /drivers/clk/hisilicon/ |
| D | clk-hisi-phase.c | 30 static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase, in hisi_phase_regval_to_degrees() argument
35 for (i = 0; i < phase->phase_num; i++) in hisi_phase_regval_to_degrees()
36 if (phase->phase_regvals[i] == regval) in hisi_phase_regval_to_degrees()
37 return phase->phase_degrees[i]; in hisi_phase_regval_to_degrees()
44 struct clk_hisi_phase *phase = to_clk_hisi_phase(hw); in hisi_clk_get_phase() local
47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
50 return hisi_phase_regval_to_degrees(phase, regval); in hisi_clk_get_phase()
53 static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase, in hisi_phase_degrees_to_regval() argument
58 for (i = 0; i < phase->phase_num; i++) in hisi_phase_degrees_to_regval()
[all …]
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| /drivers/clk/sunxi-ng/ |
| D | ccu_phase.c | 15 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_get_phase() local
22 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_get_phase()
23 delay = (reg >> phase->shift); in ccu_phase_get_phase()
24 delay &= (1 << phase->width) - 1; in ccu_phase_get_phase()
58 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_set_phase() local
110 spin_lock_irqsave(phase->common.lock, flags); in ccu_phase_set_phase()
111 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_set_phase()
112 reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); in ccu_phase_set_phase()
113 writel(reg | (delay << phase->shift), in ccu_phase_set_phase()
114 phase->common.base + phase->common.reg); in ccu_phase_set_phase()
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| /drivers/clk/sunxi/ |
| D | clk-mod0.c | 173 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_get_phase() local
179 value = readl(phase->reg); in mmc_get_phase()
180 delay = (value >> phase->offset) & 0x3; in mmc_get_phase()
215 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_set_phase() local
266 spin_lock_irqsave(phase->lock, flags); in mmc_set_phase()
267 value = readl(phase->reg); in mmc_set_phase()
268 value &= ~GENMASK(phase->offset + 3, phase->offset); in mmc_set_phase()
269 value |= delay << phase->offset; in mmc_set_phase()
270 writel(value, phase->reg); in mmc_set_phase()
271 spin_unlock_irqrestore(phase->lock, flags); in mmc_set_phase()
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| /drivers/gpu/drm/tidss/ |
| D | tidss_dispc_regs.h | 120 #define DISPC_VID_FIR_COEF_H0(phase) (0x6c + (phase) * 4) argument
122 #define DISPC_VID_FIR_COEF_H0_C(phase) (0x90 + (phase) * 4) argument
125 #define DISPC_VID_FIR_COEF_H12(phase) (0xb4 + (phase) * 4) argument
127 #define DISPC_VID_FIR_COEF_H12_C(phase) (0xf4 + (phase) * 4) argument
130 #define DISPC_VID_FIR_COEF_V0(phase) (0x134 + (phase) * 4) argument
132 #define DISPC_VID_FIR_COEF_V0_C(phase) (0x158 + (phase) * 4) argument
135 #define DISPC_VID_FIR_COEF_V12(phase) (0x17c + (phase) * 4) argument
137 #define DISPC_VID_FIR_COEF_V12_C(phase) (0x1bc + (phase) * 4) argument
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| /drivers/hwmon/pmbus/ |
| D | mp2888.c | 94 mp2888_read_phase(struct i2c_client *client, struct mp2888_data *data, int page, int phase, u8 reg) in mp2888_read_phase() argument
98 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_phase()
102 if (!((phase + 1) % 2)) in mp2888_read_phase()
128 mp2888_read_phases(struct i2c_client *client, struct mp2888_data *data, int page, int phase) in mp2888_read_phases() argument
132 switch (phase) { in mp2888_read_phases()
134 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS1_2); in mp2888_read_phases()
137 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS3_4); in mp2888_read_phases()
140 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS5_6); in mp2888_read_phases()
143 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS7_8); in mp2888_read_phases()
146 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS9_10); in mp2888_read_phases()
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| D | mp2975.c | 90 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, in mp2975_read_word_helper() argument
93 int ret = pmbus_read_word_data(client, page, phase, reg); in mp2975_read_word_helper()
122 int page, int phase, u8 reg) in mp2975_read_phase() argument
126 ret = pmbus_read_word_data(client, page, phase, reg); in mp2975_read_phase()
130 if (!((phase + 1) % MP2975_PAGE_NUM)) in mp2975_read_phase()
153 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); in mp2975_read_phase()
163 int page, int phase) in mp2975_read_phases() argument
168 switch (phase) { in mp2975_read_phases()
170 ret = mp2975_read_phase(client, data, page, phase, in mp2975_read_phases()
174 ret = mp2975_read_phase(client, data, page, phase, in mp2975_read_phases()
[all …]
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| D | ir35221.c | 25 int phase, int reg) in ir35221_read_word_data() argument
31 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
35 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
39 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
43 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
47 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
51 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
55 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
59 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
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| D | lt7182s.c | 35 static int lt7182s_read_word_data(struct i2c_client *client, int page, int phase, int reg) in lt7182s_read_word_data() argument
42 ret = pmbus_read_word_data(client, page, phase, MFR_READ_ITH); in lt7182s_read_word_data()
44 ret = pmbus_read_word_data(client, 0, phase, MFR_READ_EXTVCC); in lt7182s_read_word_data()
47 ret = pmbus_read_word_data(client, page, phase, MFR_IOUT_PEAK); in lt7182s_read_word_data()
50 ret = pmbus_read_word_data(client, page, phase, MFR_VOUT_PEAK); in lt7182s_read_word_data()
53 ret = pmbus_read_word_data(client, page, phase, MFR_VIN_PEAK); in lt7182s_read_word_data()
56 ret = pmbus_read_word_data(client, page, phase, MFR_TEMPERATURE_1_PEAK); in lt7182s_read_word_data()
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| D | ltc3815.c | 73 int phase, int reg) in ltc3815_read_word_data() argument
79 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
83 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
87 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
91 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
95 ret = pmbus_read_word_data(client, page, phase, in ltc3815_read_word_data()
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| /drivers/char/ |
| D | ppdev.c | 397 pp->saved_state.phase = info->phase; in pp_do_ioctl()
399 info->phase = pp->state.phase; in pp_do_ioctl()
428 pp->state.phase = init_phase(mode); in pp_do_ioctl()
432 pp->pdev->port->ieee1284.phase = pp->state.phase; in pp_do_ioctl()
452 int phase; in pp_do_ioctl() local
454 if (copy_from_user(&phase, argp, sizeof(phase))) in pp_do_ioctl()
458 pp->state.phase = phase; in pp_do_ioctl()
461 pp->pdev->port->ieee1284.phase = phase; in pp_do_ioctl()
467 int phase; in pp_do_ioctl() local
470 phase = pp->pdev->port->ieee1284.phase; in pp_do_ioctl()
[all …]
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| /drivers/gpu/drm/imx/dcss/ |
| D | dcss-scaler.c | 178 int phase; in dcss_scaler_gaussian_filter() local
183 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
184 coef[phase][0] = 0; in dcss_scaler_gaussian_filter()
185 coef[phase][PSC_NUM_TAPS - 1] = 0; in dcss_scaler_gaussian_filter()
232 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
237 sum += coef[phase][i]; in dcss_scaler_gaussian_filter()
239 ll_temp = coef[phase][i]; in dcss_scaler_gaussian_filter()
243 coef[phase][i] = (int)ll_temp; in dcss_scaler_gaussian_filter()
589 int i, phase; in dcss_scaler_program_5_coef_set() local
605 for (phase = (PSC_NUM_PHASES >> 1) - 1; in dcss_scaler_program_5_coef_set()
[all …]
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| /drivers/parport/ |
| D | ieee1284_ops.c | 52 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat()
138 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_write_compat()
171 port->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_nibble()
221 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_nibble()
224 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_nibble()
259 port->physport->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_byte()
306 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_byte()
309 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_byte()
345 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in ecp_forward_to_reverse()
348 port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN; in ecp_forward_to_reverse()
[all …]
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| /drivers/net/wwan/iosm/ |
| D | iosm_ipc_imem_ops.c | 19 ipc_imem_phase_get_string(ipc_imem->phase), if_id); in ipc_imem_sys_wwan_open()
24 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_open()
66 if (ipc_imem->phase != IPC_P_RUN) { in ipc_imem_sys_wwan_transmit()
68 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_transmit()
146 enum ipc_phase phase; in ipc_imem_is_channel_active() local
149 phase = ipc_imem->phase; in ipc_imem_is_channel_active()
152 switch (phase) { in ipc_imem_is_channel_active()
174 channel->channel_id, phase); in ipc_imem_is_channel_active()
203 curr_phase = ipc_imem->phase; in ipc_imem_sys_port_close()
294 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_port_open()
[all …]
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| D | iosm_ipc_imem.c | 291 ipc_imem_phase_get_string(ipc_imem->phase), in ipc_imem_ipc_init_check()
540 return (ipc_imem->phase == IPC_P_RUN && in ipc_imem_get_exec_stage_buffered()
572 if (ipc_imem->phase != IPC_P_RUN) { in ipc_imem_run_state_worker()
638 enum ipc_phase old_phase, phase; in ipc_imem_handle_irq() local
647 old_phase = ipc_imem->phase; in ipc_imem_handle_irq()
657 phase = ipc_imem_phase_update(ipc_imem); in ipc_imem_handle_irq()
659 switch (phase) { in ipc_imem_handle_irq()
697 ipc_imem_phase_get_string(phase)); in ipc_imem_handle_irq()
765 if ((phase == IPC_P_PSI || phase == IPC_P_EBL) && in ipc_imem_handle_irq()
807 if (ipc_imem->phase != IPC_P_ROM) { in ipc_imem_phase_update_check()
[all …]
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| /drivers/char/ipmi/ |
| D | kcs_bmc_cdev_ipmi.c | 76 enum kcs_ipmi_phases phase; member
133 priv->phase = KCS_PHASE_ERROR; in kcs_bmc_ipmi_force_abort()
145 switch (priv->phase) { in kcs_bmc_ipmi_handle_data()
147 priv->phase = KCS_PHASE_WRITE_DATA; in kcs_bmc_ipmi_handle_data()
165 priv->phase = KCS_PHASE_WRITE_DONE; in kcs_bmc_ipmi_handle_data()
187 priv->phase = KCS_PHASE_IDLE; in kcs_bmc_ipmi_handle_data()
198 priv->phase = KCS_PHASE_ABORT_ERROR2; in kcs_bmc_ipmi_handle_data()
205 priv->phase = KCS_PHASE_IDLE; in kcs_bmc_ipmi_handle_data()
224 priv->phase = KCS_PHASE_WRITE_START; in kcs_bmc_ipmi_handle_cmd()
231 if (priv->phase != KCS_PHASE_WRITE_DATA) { in kcs_bmc_ipmi_handle_cmd()
[all …]
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| /drivers/scsi/pcmcia/ |
| D | nsp_cs.c | 231 scsi_pointer->phase = PH_UNDETERMINED; in nsp_queuecommand_lck()
371 unsigned char phase, arbit; in nsphw_start_selection() local
375 phase = nsp_index_read(base, SCSIBUSMON); in nsphw_start_selection()
376 if(phase != BUSMON_BUS_FREE) { in nsphw_start_selection()
383 scsi_pointer->phase = PH_ARBSTART; in nsphw_start_selection()
403 scsi_pointer->phase = PH_SELSTART; in nsphw_start_selection()
550 unsigned char phase, i_src; in nsp_expect_signal() local
556 phase = nsp_index_read(base, SCSIBUSMON); in nsp_expect_signal()
557 if (phase == 0xff) { in nsp_expect_signal()
566 if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) { in nsp_expect_signal()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_dccg.c | 53 int phase; in dccg21_update_dpp_dto() local
67 phase = (req_dppclk + 9999) / 10000; in dccg21_update_dpp_dto()
69 if (phase > modulo) { in dccg21_update_dpp_dto()
74 phase = modulo; in dccg21_update_dpp_dto()
85 phase = 10; in dccg21_update_dpp_dto()
89 DPPCLK0_DTO_PHASE, phase, in dccg21_update_dpp_dto()
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| /drivers/mmc/core/ |
| D | host.c | 225 struct mmc_clk_phase *phase) in mmc_of_parse_timing_phase() argument
231 phase->valid = !rc; in mmc_of_parse_timing_phase()
232 if (phase->valid) { in mmc_of_parse_timing_phase()
233 phase->in_deg = degrees[0]; in mmc_of_parse_timing_phase()
234 phase->out_deg = degrees[1]; in mmc_of_parse_timing_phase()
244 &map->phase[MMC_TIMING_LEGACY]); in mmc_of_parse_clk_phase()
246 &map->phase[MMC_TIMING_MMC_HS]); in mmc_of_parse_clk_phase()
248 &map->phase[MMC_TIMING_SD_HS]); in mmc_of_parse_clk_phase()
250 &map->phase[MMC_TIMING_UHS_SDR12]); in mmc_of_parse_clk_phase()
252 &map->phase[MMC_TIMING_UHS_SDR25]); in mmc_of_parse_clk_phase()
[all …]
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| /drivers/infiniband/hw/efa/ |
| D | efa_com.c | 142 sq->phase = 1; in efa_com_admin_init_sq()
178 cq->phase = 1; in efa_com_admin_init_cq()
219 aenq->phase = 1; in efa_com_admin_init_aenq()
324 EFA_ADMIN_AQ_COMMON_DESC_PHASE, aq->sq.phase); in __efa_com_submit_admin_cmd()
347 aq->sq.phase = !aq->sq.phase; in __efa_com_submit_admin_cmd()
438 u8 phase; in efa_com_handle_admin_completion() local
444 phase = aq->cq.phase; in efa_com_handle_admin_completion()
450 EFA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) { in efa_com_handle_admin_completion()
462 phase = !phase; in efa_com_handle_admin_completion()
469 aq->cq.phase = phase; in efa_com_handle_admin_completion()
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| /drivers/leds/trigger/ |
| D | ledtrig-heartbeat.c | 27 unsigned int phase; member
52 switch (heartbeat_data->phase) { in led_heartbeat_function()
65 heartbeat_data->phase++; in led_heartbeat_function()
71 heartbeat_data->phase++; in led_heartbeat_function()
77 heartbeat_data->phase++; in led_heartbeat_function()
84 heartbeat_data->phase = 0; in led_heartbeat_function()
140 heartbeat_data->phase = 0; in heartbeat_trig_activate()
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| /drivers/scsi/ |
| D | NCR5380.c | 765 p = ncmd->phase; in NCR5380_dma_complete()
969 unsigned char tmp[3], phase; in NCR5380_select() local
1200 phase = PHASE_MSGOUT; in NCR5380_select()
1201 NCR5380_transfer_pio(instance, &phase, &len, &data, 0); in NCR5380_select()
1258 unsigned char *phase, int *count, in NCR5380_transfer_pio() argument
1262 unsigned char p = *phase, tmp; in NCR5380_transfer_pio()
1361 *phase = tmp & PHASE_MASK; in NCR5380_transfer_pio()
1363 *phase = PHASE_UNKNOWN; in NCR5380_transfer_pio()
1365 if (!c || (*phase == p)) in NCR5380_transfer_pio()
1410 unsigned char *msgptr, phase, tmp; in do_abort() local
[all …]
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| D | aha152x.c | 326 int phase; member
899 acp->phase |= 1 << 16; in setup_expected_interrupts()
901 if (acp->phase & selecting) { in setup_expected_interrupts()
906 SETPORT(SIMODE0, (acp->phase & spiordy) ? ENSPIORDY : 0); in setup_expected_interrupts()
928 struct completion *complete, int phase) in aha152x_internal_queue() argument
934 acp->phase = not_issued | phase; in aha152x_internal_queue()
939 if (acp->phase & (resetting | check_condition)) { in aha152x_internal_queue()
961 if ((phase & resetting) || !scsi_sglist(SCpnt)) { in aha152x_internal_queue()
1020 if (aha152x_priv(SCpnt)->phase & resetting) in aha152x_scsi_done()
1106 if (aha152x_priv(SCpnt)->phase & resetted) { in aha152x_device_reset()
[all …]
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| D | mesh.c | 96 u8 phase; member
153 enum mesh_phase phase; /* what we're currently trying to do */ member
222 tlp->phase = (ms->msgphase << 4) + ms->phase; in dlog()
253 t, lp->bs1, lp->bs0, lp->phase); in dumplog()
278 lp->bs1, lp->bs0, lp->phase, lp->tgt); in dumpslog()
323 ms->phase, ms->msgphase, ms->conn_tgt, ms->data_ptr); in mesh_dump_regs()
391 ms->phase = idle; in mesh_init()
419 ms->phase = arbitrating; in mesh_start_cmd()
459 if (ms->phase != arbitrating) in mesh_start_cmd()
467 ms->phase = idle; in mesh_start_cmd()
[all …]
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| D | mac53c94.c | 54 enum fsc_phase phase; /* what we're currently trying to do */ member
95 if (state->phase == idle) in mac53c94_queue_lck()
150 if (state->phase != idle || state->current_req != NULL) in mac53c94_start()
175 state->phase = selecting; in mac53c94_start()
211 intr, stat, seq, state->phase); in mac53c94_interrupt()
224 intr, stat, seq, state->phase); in mac53c94_interrupt()
232 intr, stat, seq, state->phase); in mac53c94_interrupt()
246 switch (state->phase) { in mac53c94_interrupt()
277 state->phase = dataing; in mac53c94_interrupt()
282 state->phase = completing; in mac53c94_interrupt()
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| /drivers/scsi/arm/ |
| D | fas216.c | 202 info->scsi.type, info->scsi.phase); in fas216_dumpinfo()
278 if (info->scsi.phase < ARRAY_SIZE(phases) && in fas216_drv_phase()
279 phases[info->scsi.phase]) in fas216_drv_phase()
280 return phases[info->scsi.phase]; in fas216_drv_phase()
567 info->scsi.phase = PHASE_MSGOUT_EXPECT; in fas216_handlesync()
608 info->scsi.phase = PHASE_MSGOUT_EXPECT; in fas216_handlesync()
638 SCp->phase -= bytes_transferred; in fas216_updateptrs()
720 total = info->scsi.SCp.phase; in fas216_cleanuptransfer()
738 if (info->scsi.phase == PHASE_DATAOUT) in fas216_cleanuptransfer()
758 info->scsi.SCp.phase); in fas216_transfer()
[all …]
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