Searched refs:pll_loopdiv (Results 1 – 4 of 4) sorted by relevance
1608 .io.pll_loopdiv = 20,2001 .io.pll_loopdiv = 6,2030 u32 pll_loopdiv; /* New prediv */ member2036 u32 pll_loopdiv; member2052 adc->pll_loopdiv = loopdiv; in dib8096p_get_best_sampling()2092 adc->pll_loopdiv = loopdiv; in dib8096p_get_best_sampling()2107 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0) in dib8096p_get_best_sampling()2133 pll.pll_ratio = adc.pll_loopdiv; in dib8096p_agc_startup()2332 .io.pll_loopdiv = 8,2351 .io.pll_loopdiv = 8,[all …]
402 u16 pll_loopdiv, u16 free_div, u16 dsuScaler) in dib0700_set_clock() argument417 st->buf[4] = (pll_loopdiv >> 8) & 0xff; /* MSB */ in dib0700_set_clock()418 st->buf[5] = pll_loopdiv & 0xff; /* LSB */ in dib0700_set_clock()
21 u8 pll_loopdiv:6; member
533 …if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_pr… in dib0090_reset_digital()545 …PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io… in dib0090_reset_digital()605 …if ((PllCfg & 0x1FFF) != ((cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io.pll_pr… in dib0090_fw_reset_digital()616 …PllCfg = (1 << 15) | (0 << 13) | (cfg->io.pll_range << 12) | (cfg->io.pll_loopdiv << 6) | (cfg->io… in dib0090_fw_reset_digital()