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Searched refs:pll_ref_freq (Results 1 – 6 of 6) sorted by relevance

/drivers/clk/tegra/
Dclk-tegra-fixed.c28 unsigned long *pll_ref_freq) in tegra_osc_clk_init() argument
91 if (pll_ref_freq) in tegra_osc_clk_init()
92 *pll_ref_freq = *osc_freq / pll_ref_div; in tegra_osc_clk_init()
Dclk-tegra114.c888 static unsigned long pll_ref_freq; variable
994 0, &pll_re_vco_params, &pll_re_lock, pll_ref_freq); in tegra114_pll_init()
1335 &pll_ref_freq) < 0) in tegra114_clock_init()
Dclk-tegra124.c123 static unsigned long pll_ref_freq; variable
1192 0, &pll_re_vco_params, &pll_re_lock, pll_ref_freq); in tegra124_pll_init()
1489 &pll_ref_freq) < 0) in tegra124_132_clock_init_pre()
Dclk-tegra210.c305 static unsigned long pll_ref_freq; variable
2900 if (fentry->input_rate == pll_ref_freq) in tegra210_enable_pllu()
2905 pr_err("Unknown PLL_U reference frequency %lu\n", pll_ref_freq); in tegra210_enable_pllu()
3337 &pll_re_lock, pll_ref_freq); in tegra210_pll_init()
3364 0, &pll_c4_vco_params, NULL, pll_ref_freq); in tegra210_pll_init()
3787 &osc_freq, &pll_ref_freq) < 0) in tegra210_clock_init()
Dclk.h872 unsigned long *pll_ref_freq);
/drivers/gpu/drm/radeon/
Dradeon_legacy_tv.c238 uint16_t *pll_ref_freq) in radeon_legacy_tv_get_std_mode() argument
253 if (pll_ref_freq) in radeon_legacy_tv_get_std_mode()
254 *pll_ref_freq = pll->reference_freq; in radeon_legacy_tv_get_std_mode()
535 uint16_t pll_ref_freq; in radeon_legacy_tv_mode_set() local
546 const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, &pll_ref_freq); in radeon_legacy_tv_mode_set()
618 if (pll_ref_freq == 2700) in radeon_legacy_tv_mode_set()
685 if (pll_ref_freq == 2700) { in radeon_legacy_tv_mode_set()
695 if (pll_ref_freq == 2700) { in radeon_legacy_tv_mode_set()