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Searched refs:port_ctrl (Results 1 – 9 of 9) sorted by relevance

/drivers/net/ethernet/broadcom/genet/
Dbcmmii.c189 u32 port_ctrl; in bcmgenet_mii_config() local
203 port_ctrl = PORT_MODE_INT_GPHY; in bcmgenet_mii_config()
205 port_ctrl = PORT_MODE_INT_EPHY; in bcmgenet_mii_config()
210 port_ctrl |= LED_ACT_SOURCE_MAC; in bcmgenet_mii_config()
218 port_ctrl = PORT_MODE_EXT_EPHY; in bcmgenet_mii_config()
230 port_ctrl = PORT_MODE_EXT_RVMII_50; in bcmgenet_mii_config()
232 port_ctrl = PORT_MODE_EXT_RVMII_25; in bcmgenet_mii_config()
243 port_ctrl = PORT_MODE_EXT_GPHY; in bcmgenet_mii_config()
249 port_ctrl = PORT_MODE_EXT_GPHY; in bcmgenet_mii_config()
254 port_ctrl = PORT_MODE_EXT_GPHY; in bcmgenet_mii_config()
[all …]
/drivers/media/pci/smipcie/
Dsmipcie-main.c19 u32 port_mux, port_ctrl, int_stat; in smi_hw_init() local
33 port_ctrl = smi_read(VIDEO_CTRL_STATUS_A); in smi_hw_init()
34 port_ctrl &= ~0x01; in smi_hw_init()
35 smi_write(VIDEO_CTRL_STATUS_A, port_ctrl); in smi_hw_init()
36 port_ctrl = smi_read(MPEG2_CTRL_A); in smi_hw_init()
37 port_ctrl &= ~0x40; in smi_hw_init()
38 port_ctrl |= 0x80; in smi_hw_init()
39 smi_write(MPEG2_CTRL_A, port_ctrl); in smi_hw_init()
41 port_ctrl = smi_read(VIDEO_CTRL_STATUS_B); in smi_hw_init()
42 port_ctrl &= ~0x01; in smi_hw_init()
[all …]
/drivers/scsi/qla4xxx/
Dql4_dbg.c86 (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_ctrl), in qla4xxx_dump_registers()
87 readw(&ha->reg->u2.isp4010.port_ctrl)); in qla4xxx_dump_registers()
109 offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl), in qla4xxx_dump_registers()
110 readw(&ha->reg->u2.isp4022.p0.port_ctrl)); in qla4xxx_dump_registers()
Dql4_def.h958 &ha->reg->u2.isp4010.port_ctrl : in isp_port_ctrl()
959 &ha->reg->u2.isp4022.p0.port_ctrl); in isp_port_ctrl()
Dql4_fw.h25 __le32 port_ctrl; /* 0x58 */ member
131 __le32 port_ctrl; member
/drivers/gpu/drm/i915/display/
Dvlv_dsi.c607 i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ? in vlv_dsi_clear_device_ready() local
628 intel_de_wait_for_clear(dev_priv, port_ctrl, in vlv_dsi_clear_device_ready()
633 val = intel_de_read(dev_priv, port_ctrl); in vlv_dsi_clear_device_ready()
634 intel_de_write(dev_priv, port_ctrl, val & ~LP_OUTPUT_HOLD); in vlv_dsi_clear_device_ready()
672 i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ? in intel_dsi_port_enable() local
676 temp = intel_de_read(dev_priv, port_ctrl); in intel_dsi_port_enable()
696 intel_de_write(dev_priv, port_ctrl, temp | DPI_ENABLE); in intel_dsi_port_enable()
697 intel_de_posting_read(dev_priv, port_ctrl); in intel_dsi_port_enable()
709 i915_reg_t port_ctrl = IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ? in intel_dsi_port_disable() local
714 temp = intel_de_read(dev_priv, port_ctrl); in intel_dsi_port_disable()
[all …]
/drivers/ata/
Dahci_brcm.c121 u32 port_ctrl, host_caps; in brcm_sata_alpm_init() local
133 for (i = 0, port_ctrl = SATA_FIRST_PORT_CTRL; in brcm_sata_alpm_init()
135 i++, port_ctrl += SATA_NEXT_PORT_CTRL_OFFSET) { in brcm_sata_alpm_init()
138 hpriv->mmio + SATA_PORT_PCTRL6(port_ctrl)); in brcm_sata_alpm_init()
/drivers/net/dsa/qca/
Dar9331.c396 u32 port_mask, port_ctrl, val; in ar9331_sw_setup_port() local
400 port_ctrl = FIELD_PREP(AR9331_SW_PORT_CTRL_PORT_STATE, in ar9331_sw_setup_port()
411 port_ctrl |= AR9331_SW_PORT_CTRL_HEAD_EN; in ar9331_sw_setup_port()
429 ret = regmap_write(regmap, AR9331_SW_REG_PORT_CTRL(port), port_ctrl); in ar9331_sw_setup_port()
/drivers/net/dsa/b53/
Db53_common.c696 u8 port_ctrl; in b53_enable_cpu_port() local
702 port_ctrl = PORT_CTRL_RX_BCST_EN | in b53_enable_cpu_port()
705 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), port_ctrl); in b53_enable_cpu_port()