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Searched refs:post_div_mask (Results 1 – 18 of 18) sorted by relevance

/drivers/clk/qcom/
Dclk-pll.h70 u32 post_div_mask; member
Dclk-cpu-8996.c112 .post_div_mask = 0x3 << 8,
214 .post_div_mask = 0x3 << 8,
Dclk-alpha-pll.h128 u32 post_div_mask; member
Dlcc-ipq806x.c54 .post_div_mask = BIT(21) | BIT(20),
Dclk-pll.c237 mask |= config->post_div_mask; in clk_pll_configure()
Dclk-alpha-pll.c340 mask |= config->post_div_mask; in clk_alpha_pll_configure()
1121 if (config->post_div_mask) { in clk_fabia_pll_configure()
1122 mask = config->post_div_mask; in clk_fabia_pll_configure()
Dmmcc-msm8974.c2336 .post_div_mask = 0x3 << 8,
2350 .post_div_mask = 0x3 << 8,
Dmmcc-apq8084.c3038 .post_div_mask = 0x3 << 8,
3052 .post_div_mask = 0x3 << 8,
Dgcc-qcm2290.c310 .post_div_mask = GENMASK(11, 8),
361 .post_div_mask = GENMASK(9, 8),
Dgcc-sm6115.c363 .post_div_mask = GENMASK(11, 8),
413 .post_div_mask = GENMASK(9, 8),
Dgcc-ipq8074.c4431 .post_div_mask = GENMASK(9, 8),
4443 .post_div_mask = GENMASK(11, 8),
Dgcc-msm8939.c218 .post_div_mask = BIT(9) | BIT(8),
265 .post_div_mask = BIT(9) | BIT(8),
Dgcc-ipq6018.c4156 .post_div_mask = GENMASK(9, 8),
4168 .post_div_mask = GENMASK(11, 8),
Dgcc-qcs404.c358 .post_div_mask = 0xf << 8,
Dmmcc-msm8994.c100 .post_div_mask = 0xf00,
Dmmcc-msm8960.c89 .post_div_mask = 0x3 << 20,
Dgcc-msm8976.c166 .post_div_mask = 0x3 << 8,
Dgcc-msm8953.c121 .post_div_mask = GENMASK(11, 8),