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Searched refs:pp_clock_type (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/pm/inc/
Damdgpu_dpm.h430 enum pp_clock_type type,
434 enum pp_clock_type type,
472 enum pp_clock_type type,
475 enum pp_clock_type type,
482 enum pp_clock_type type,
/drivers/gpu/drm/amd/include/
Dkgd_pp_interface.h99 enum pp_clock_type { enum
325 int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask);
326 int (*print_clock_levels)(void *handle, enum pp_clock_type type, char *buf);
327 int (*emit_clock_levels)(void *handle, enum pp_clock_type type, char *buf, int *offset);
/drivers/gpu/drm/amd/pm/powerplay/inc/
Dhwmgr.h315 int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask);
317 enum pp_clock_type type, char *buf, int *offset);
318 int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
/drivers/gpu/drm/amd/pm/
Damdgpu_dpm.c595 enum pp_clock_type type, in amdgpu_dpm_get_dpm_freq_range()
618 enum pp_clock_type type, in amdgpu_dpm_set_soft_freq_range()
1012 enum pp_clock_type type, in amdgpu_dpm_print_clock_levels()
1031 enum pp_clock_type type, in amdgpu_dpm_emit_clock_levels()
1085 enum pp_clock_type type, in amdgpu_dpm_force_clock_level()
Damdgpu_pm.c848 enum pp_clock_type od_clocks[6] = { in amdgpu_get_pp_od_clk_voltage()
1005 enum pp_clock_type type, in amdgpu_get_pp_dpm_clock()
1073 enum pp_clock_type type, in amdgpu_set_pp_dpm_clock()
/drivers/gpu/drm/amd/pm/powerplay/
Damd_powerplay.c702 enum pp_clock_type type, uint32_t mask) in pp_dpm_force_clock_level()
723 enum pp_clock_type type, in pp_dpm_emit_clock_levels()
739 enum pp_clock_type type, char *buf) in pp_dpm_print_clock_levels()
/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c2038 enum pp_clock_type type, in smu_force_ppclk_levels()
2427 static enum smu_clk_type smu_convert_to_smuclk(enum pp_clock_type type) in smu_convert_to_smuclk()
2468 enum pp_clock_type type, in smu_print_ppclk_levels()
2481 static int smu_emit_ppclk_levels(void *handle, enum pp_clock_type type, char *buf, int *offset) in smu_emit_ppclk_levels()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.c973 enum pp_clock_type type, uint32_t mask) in smu10_force_clock_level()
1028 enum pp_clock_type type, char *buf) in smu10_print_clock_levels()
Dvega12_hwmgr.c59 enum pp_clock_type type, uint32_t mask);
2017 enum pp_clock_type type, uint32_t mask) in vega12_force_clock_level()
2266 enum pp_clock_type type, char *buf) in vega12_print_clock_levels()
Dsmu8_hwmgr.c1536 enum pp_clock_type type, uint32_t mask) in smu8_force_clock_level()
1557 enum pp_clock_type type, char *buf) in smu8_print_clock_levels()
Dvega10_hwmgr.c4242 enum pp_clock_type type, uint32_t mask) in vega10_force_clock_level()
4650 enum pp_clock_type type, char *buf, int *offset) in vega10_emit_clock_levels()
4796 enum pp_clock_type type, char *buf) in vega10_print_clock_levels()
Dsmu7_hwmgr.c175 enum pp_clock_type type, uint32_t mask);
4911 enum pp_clock_type type, uint32_t mask) in smu7_force_clock_level()
4957 enum pp_clock_type type, char *buf) in smu7_print_clock_levels()
Dvega20_hwmgr.c2549 enum pp_clock_type type, uint32_t mask) in vega20_force_clock_level()
3348 enum pp_clock_type type, char *buf) in vega20_print_clock_levels()