| /drivers/block/paride/ |
| D | ppc6lnx.c | 104 static int ppc6_select(Interface *ppc);
105 static void ppc6_deselect(Interface *ppc);
106 static void ppc6_send_cmd(Interface *ppc, u8 cmd);
107 static void ppc6_wr_data_byte(Interface *ppc, u8 data);
108 static u8 ppc6_rd_data_byte(Interface *ppc);
109 static u8 ppc6_rd_port(Interface *ppc, u8 port);
110 static void ppc6_wr_port(Interface *ppc, u8 port, u8 data);
111 static void ppc6_rd_data_blk(Interface *ppc, u8 *data, long count);
112 static void ppc6_wait_for_fifo(Interface *ppc);
113 static void ppc6_wr_data_blk(Interface *ppc, u8 *data, long count);
[all …]
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| /drivers/staging/media/atomisp/pci/css_2401_system/hrt/ |
| D | mipi_backend_defs.h | 166 …IPI_BACKEND_STREAM_PIX_LS_BIT(sid_width, ppc, pix_width, p) (HRT_MIPI_BACKEND_STREAM_PIX_VAL_BIT(s… argument
167 …MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_width, ppc, pix_width, p) (HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(s… argument
175 …BACKEND_STREAM_BITS(sid_width, ppc, pix_width) (HRT_MIPI_BACKEND_STREAM_PIX_MS_BIT(sid_wid… argument
206 …T_MIPI_BACKEND_STREAM_VC_LS_BIT(sid_width, ppc, pix_width) HRT_MIPI_BACKEND_STREAM_PIX_LS_BIT(sid… argument
207 …RT_MIPI_BACKEND_STREAM_VC_MS_BIT(sid_width, ppc, pix_width) HRT_MIPI_BACKEND_STREAM_VC_LS_BIT(sid… argument
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| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | ctxgf117.c | 257 int gpc, ppc; in gf117_grctx_generate_attrib() local
265 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) { in gf117_grctx_generate_attrib()
266 const u32 a = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
267 const u32 b = beta * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
269 const u32 o = PPC_UNIT(gpc, ppc, 0); in gf117_grctx_generate_attrib()
270 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gf117_grctx_generate_attrib()
274 bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
276 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gf117_grctx_generate_attrib()
290 .ppc = gf117_grctx_pack_ppc,
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| D | ctxgp102.c | 52 int gpc, ppc, b, n = 0; in gp102_grctx_generate_attrib() local
69 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gp102_grctx_generate_attrib()
70 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
74 const u32 o = PPC_UNIT(gpc, ppc, 0); in gp102_grctx_generate_attrib()
75 const u32 p = GPC_UNIT(gpc, 0xc44 + (ppc * 4)); in gp102_grctx_generate_attrib()
76 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gp102_grctx_generate_attrib()
85 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
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| D | ctxgm107.c | 921 int gpc, ppc, n = 0; in gm107_grctx_generate_attrib() local
930 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gm107_grctx_generate_attrib()
931 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gm107_grctx_generate_attrib()
932 const u32 bs = attrib * gr->ppc_tpc_nr[gpc][ppc]; in gm107_grctx_generate_attrib()
934 const u32 o = PPC_UNIT(gpc, ppc, 0); in gm107_grctx_generate_attrib()
935 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gm107_grctx_generate_attrib()
939 bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gm107_grctx_generate_attrib()
942 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gm107_grctx_generate_attrib()
972 .ppc = gm107_grctx_pack_ppc,
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| D | ctxgp100.c | 56 int gpc, ppc, b, n = 0; in gp100_grctx_generate_attrib() local
73 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gp100_grctx_generate_attrib()
74 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
77 const u32 o = PPC_UNIT(gpc, ppc, 0); in gp100_grctx_generate_attrib()
78 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gp100_grctx_generate_attrib()
86 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
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| D | ctxgm200.c | 87 int gpc, ppc, i; in gm200_grctx_generate_dist_skip_table() local
90 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) { in gm200_grctx_generate_dist_skip_table()
91 u8 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
92 u8 ppc_tpcm = gr->ppc_tpc_mask[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
95 ppc_tpcm ^= gr->ppc_tpc_mask[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
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| D | ctxgv100.c | 73 int gpc, ppc, b, n = 0; in gv100_grctx_generate_attrib() local
89 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gv100_grctx_generate_attrib()
90 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
94 const u32 o = PPC_UNIT(gpc, ppc, 0); in gv100_grctx_generate_attrib()
95 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gv100_grctx_generate_attrib()
103 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
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| D | ctxgk104.c | 935 int i, j, gpc, ppc; in gk104_grctx_generate_alpha_beta_tables() local
944 for (ppc = 0; ppc < gr->func->ppc_nr; ppc++) { in gk104_grctx_generate_alpha_beta_tables()
945 u32 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc]; in gk104_grctx_generate_alpha_beta_tables()
956 pmask = gr->ppc_tpc_mask[gpc][ppc]; in gk104_grctx_generate_alpha_beta_tables()
961 pmask ^= gr->ppc_tpc_mask[gpc][ppc]; in gk104_grctx_generate_alpha_beta_tables()
987 .ppc = gk104_grctx_pack_ppc,
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| D | gk104.c | 418 int gpc, ppc; in gk104_gr_init_ppc_exceptions() local
421 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) { in gk104_gr_init_ppc_exceptions()
422 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gk104_gr_init_ppc_exceptions()
424 nvkm_wr32(device, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000); in gk104_gr_init_ppc_exceptions()
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| D | ctxgk110b.c | 81 .ppc = gk110_grctx_pack_ppc,
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| D | ctxgk208.c | 547 .ppc = gk208_grctx_pack_ppc,
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| D | ctxgk110.c | 841 .ppc = gk110_grctx_pack_ppc,
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| D | ctxgf100.h | 35 const struct gf100_gr_pack *ppc; member
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| D | ctxgf100.c | 1378 gf100_gr_mmio(gr, grctx->ppc); in gf100_grctx_generate_main()
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| /drivers/crypto/vmx/ |
| D | Makefile | 3 vmx-crypto-objs := vmx.o aesp8-ppc.o ghashp8-ppc.o aes.o aes_cbc.o aes_ctr.o aes_xts.o ghash.o
8 targets += aesp8-ppc.S ghashp8-ppc.S
10 $(obj)/aesp8-ppc.S $(obj)/ghashp8-ppc.S: $(obj)/%.S: $(src)/%.pl FORCE
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| D | .gitignore | 2 aesp8-ppc.S
3 ghashp8-ppc.S
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| /drivers/acpi/ |
| D | processor_perflib.c | 55 unsigned long long ppc = 0; in acpi_processor_get_platform_limit() local
67 status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc); in acpi_processor_get_platform_limit()
77 index = ppc; in acpi_processor_get_platform_limit()
80 ppc >= pr->performance->state_count) in acpi_processor_get_platform_limit()
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| /drivers/cpufreq/ |
| D | Makefile | 103 obj-$(CONFIG_CPU_FREQ_CBE) += ppc-cbe-cpufreq.o
104 ppc-cbe-cpufreq-y += ppc_cbe_cpufreq_pervasive.o ppc_cbe_cpufreq.o
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| /drivers/gpu/drm/vc4/ |
| D | vc4_crtc.c | 330 u8 ppc = pv_data->pixels_per_clock; in vc4_crtc_config_pv() local
347 VC4_SET_FIELD((mode->htotal - mode->hsync_end) * pixel_rep / ppc, in vc4_crtc_config_pv()
349 VC4_SET_FIELD((mode->hsync_end - mode->hsync_start) * pixel_rep / ppc, in vc4_crtc_config_pv()
353 VC4_SET_FIELD((mode->hsync_start - mode->hdisplay) * pixel_rep / ppc, in vc4_crtc_config_pv()
355 VC4_SET_FIELD(mode->hdisplay * pixel_rep / ppc, in vc4_crtc_config_pv()
392 VC4_SET_FIELD(mode->htotal * pixel_rep / (2 * ppc), in vc4_crtc_config_pv()
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| /drivers/staging/media/deprecated/vpfe_capture/ |
| D | dm355_ccdc.c | 206 enum ccdc_frmfmt frm_fmt, int ppc) in ccdc_setwin() argument
219 horz_start = image_win->left << (ppc - 1); in ccdc_setwin()
220 horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1; in ccdc_setwin()
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| D | dm644x_ccdc.c | 118 int ppc) in ccdc_setwin() argument
130 horz_start = image_win->left << (ppc - 1); in ccdc_setwin()
131 horz_nr_pixels = (image_win->width << (ppc - 1)) - 1; in ccdc_setwin()
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| D | isif.c | 269 enum ccdc_frmfmt frm_fmt, int ppc) in isif_setwin() argument
281 horz_start = image_win->left << (ppc - 1); in isif_setwin()
282 horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1; in isif_setwin()
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| /drivers/gpu/drm/etnaviv/ |
| D | etnaviv_gpu.c | 590 u32 pmc, ppc; in etnaviv_gpu_enable_mlcg() local
593 ppc = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); in etnaviv_gpu_enable_mlcg()
594 ppc |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; in etnaviv_gpu_enable_mlcg()
599 ppc |= VIVS_PM_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING; in etnaviv_gpu_enable_mlcg()
601 gpu_write(gpu, VIVS_PM_POWER_CONTROLS, ppc); in etnaviv_gpu_enable_mlcg()
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| /drivers/video/fbdev/ |
| D | ffb.c | 220 u32 ppc; member
436 &fbc->ppc); in ffb_switch_from_graph()
|