| /drivers/gpu/drm/i915/display/ |
| D | intel_psr.c | 92 switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) { in psr_global_enabled()
95 return connector->panel.vbt.psr.enable; in psr_global_enabled()
108 switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) { in psr2_global_enabled()
124 EDP_PSR_ERROR(intel_dp->psr.transcoder); in psr_irq_psr_error_bit_get()
132 EDP_PSR_POST_EXIT(intel_dp->psr.transcoder); in psr_irq_post_exit_bit_get()
140 EDP_PSR_PRE_ENTRY(intel_dp->psr.transcoder); in psr_irq_pre_entry_bit_get()
148 EDP_PSR_MASK(intel_dp->psr.transcoder); in psr_irq_mask_get()
158 imr_reg = TRANS_PSR_IMR(intel_dp->psr.transcoder); in psr_irq_control()
163 if (intel_dp->psr.debug & I915_PSR_DEBUG_IRQ) in psr_irq_control()
213 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_irq_handler()
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| D | intel_display_debugfs.c | 220 if (intel_dp->psr.psr2_enabled) { in psr_source_status()
235 EDP_PSR2_STATUS(intel_dp->psr.transcoder)); in psr_source_status()
251 EDP_PSR_STATUS(intel_dp->psr.transcoder)); in psr_source_status()
264 struct intel_psr *psr = &intel_dp->psr; in intel_psr_status() local
270 seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support)); in intel_psr_status()
271 if (psr->sink_support) in intel_psr_status()
275 if (!psr->sink_support) in intel_psr_status()
279 mutex_lock(&psr->lock); in intel_psr_status()
281 if (psr->enabled) in intel_psr_status()
282 status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled"; in intel_psr_status()
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| D | intel_bios.c | 1343 panel->vbt.psr.enable = driver->psr_enabled; in parse_panel_driver_features()
1363 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); in parse_power_conservation_features()
1525 const struct bdb_psr *psr; in parse_psr() local
1529 psr = find_section(i915, BDB_PSR); in parse_psr()
1530 if (!psr) { in parse_psr()
1535 psr_table = &psr->psr_table[panel_type]; in parse_psr()
1537 panel->vbt.psr.full_link = psr_table->full_link; in parse_psr()
1538 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; in parse_psr()
1541 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : in parse_psr()
1552 panel->vbt.psr.tp1_wakeup_time_us = 500; in parse_psr()
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| D | intel_display_types.h | 325 } psr; member
1725 struct intel_psr psr; member
1961 #define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
1962 (intel_dp)->psr.source_support)
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| /drivers/cpufreq/ |
| D | maple-cpufreq.c | 94 unsigned long psr = scom970_read(SCOM_PSR); in maple_scom_switch_freq() local
96 if ((psr & PSR_CMD_RECEIVED) == 0 && in maple_scom_switch_freq()
97 (((psr >> PSR_CUR_SPEED_SHIFT) ^ in maple_scom_switch_freq()
101 if (psr & PSR_CMD_COMPLETED) in maple_scom_switch_freq()
116 unsigned long psr = scom970_read(SCOM_PSR); in maple_scom_query_freq() local
120 if ((((psr >> PSR_CUR_SPEED_SHIFT) ^ in maple_scom_query_freq()
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| D | pmac64-cpufreq.c | 168 unsigned long psr = scom970_read(SCOM_PSR); in g5_scom_switch_freq() local
170 if ((psr & PSR_CMD_RECEIVED) == 0 && in g5_scom_switch_freq()
171 (((psr >> PSR_CUR_SPEED_SHIFT) ^ in g5_scom_switch_freq()
175 if (psr & PSR_CMD_COMPLETED) in g5_scom_switch_freq()
194 unsigned long psr = scom970_read(SCOM_PSR); in g5_scom_query_freq() local
198 if ((((psr >> PSR_CUR_SPEED_SHIFT) ^ in g5_scom_query_freq()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_psr.c | 468 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx) in dmub_psr_construct() argument
470 psr->ctx = ctx; in dmub_psr_construct()
471 psr->funcs = &psr_funcs; in dmub_psr_construct()
479 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL); in dmub_psr_create() local
481 if (psr == NULL) { in dmub_psr_create()
486 dmub_psr_construct(psr, ctx); in dmub_psr_create()
488 return psr; in dmub_psr_create()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link.c | 3156 struct dmub_psr *psr = dc->res_pool->psr; in dc_link_set_psr_allow_active() local
3159 if (psr == NULL && force_static) in dc_link_set_psr_allow_active()
3174 if (psr != NULL && link->psr_settings.psr_feature_enabled && psr->funcs->psr_set_power_opt) in dc_link_set_psr_allow_active()
3175 psr->funcs->psr_set_power_opt(psr, link->psr_settings.psr_power_opt, panel_inst); in dc_link_set_psr_allow_active()
3178 if (psr != NULL && link->psr_settings.psr_feature_enabled && in dc_link_set_psr_allow_active()
3179 force_static && psr->funcs->psr_force_static) in dc_link_set_psr_allow_active()
3180 psr->funcs->psr_force_static(psr, panel_inst); in dc_link_set_psr_allow_active()
3189 if (psr != NULL && link->psr_settings.psr_feature_enabled) { in dc_link_set_psr_allow_active()
3190 psr->funcs->psr_enable(psr, link->psr_settings.psr_allow_active, wait, panel_inst); in dc_link_set_psr_allow_active()
3205 struct dmub_psr *psr = dc->res_pool->psr; in dc_link_get_psr_state() local
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| /drivers/net/can/m_can/ |
| D | m_can.c | 779 static int m_can_handle_state_errors(struct net_device *dev, u32 psr) in m_can_handle_state_errors() argument
784 if (psr & PSR_EW && cdev->can.state != CAN_STATE_ERROR_WARNING) { in m_can_handle_state_errors()
790 if (psr & PSR_EP && cdev->can.state != CAN_STATE_ERROR_PASSIVE) { in m_can_handle_state_errors()
796 if (psr & PSR_BO && cdev->can.state != CAN_STATE_BUS_OFF) { in m_can_handle_state_errors()
819 static inline bool is_lec_err(u32 psr) in is_lec_err() argument
821 psr &= LEC_UNUSED; in is_lec_err()
823 return psr && (psr != LEC_UNUSED); in is_lec_err()
869 u32 psr) in m_can_handle_bus_errors() argument
879 is_lec_err(psr)) in m_can_handle_bus_errors()
880 work_done += m_can_handle_lec_err(dev, psr & LEC_UNUSED); in m_can_handle_bus_errors()
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| /drivers/spi/ |
| D | spi-s3c64xx.c | 909 u32 psr, speed; in s3c64xx_spi_setup() local
917 psr = clk_get_rate(sdd->src_clk) / div / spi->max_speed_hz - 1; in s3c64xx_spi_setup()
918 psr &= S3C64XX_SPI_PSR_MASK; in s3c64xx_spi_setup()
919 if (psr == S3C64XX_SPI_PSR_MASK) in s3c64xx_spi_setup()
920 psr--; in s3c64xx_spi_setup()
922 speed = clk_get_rate(sdd->src_clk) / div / (psr + 1); in s3c64xx_spi_setup()
924 if (psr+1 < S3C64XX_SPI_PSR_MASK) { in s3c64xx_spi_setup()
925 psr++; in s3c64xx_spi_setup()
932 speed = clk_get_rate(sdd->src_clk) / div / (psr + 1); in s3c64xx_spi_setup()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_link.h | 131 struct psr { struct
137 } psr; member
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| /drivers/gpu/drm/amd/display/dc/dcn302/ |
| D | dcn302_resource.c | 119 .psr = {
1120 if (pool->psr != NULL) in dcn302_resource_destruct()
1121 dmub_psr_destroy(&pool->psr); in dcn302_resource_destruct()
1415 pool->psr = dmub_psr_create(ctx); in dcn302_resource_construct()
1416 if (pool->psr == NULL) { in dcn302_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn303/ |
| D | dcn303_resource.c | 102 .psr = {
1047 if (pool->psr != NULL) in dcn303_resource_destruct()
1048 dmub_psr_destroy(&pool->psr); in dcn303_resource_destruct()
1333 pool->psr = dmub_psr_create(ctx); in dcn303_resource_construct()
1334 if (pool->psr == NULL) { in dcn303_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 679 .psr = {
801 if (pool->base.psr != NULL) in dcn21_resource_destruct()
802 dmub_psr_destroy(&pool->base.psr); in dcn21_resource_destruct()
1585 pool->base.psr = dmub_psr_create(ctx); in dcn21_resource_construct()
1587 if (pool->base.psr == NULL) { in dcn21_resource_construct()
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| /drivers/staging/media/deprecated/saa7146/common/ |
| D | saa7146_core.c | 321 u32 psr = saa7146_read(dev, PSR); in interrupt_hw() local
324 dev->name, isr, psr, ssr); in interrupt_hw()
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| /drivers/net/wan/ |
| D | n2.c | 145 u8 psr = inb(card->io + N2_PSR); in openwin() local
147 outb((psr & ~PSR_PAGEBITS) | page, card->io + N2_PSR); in openwin()
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| /drivers/gpu/drm/amd/display/dc/dcn316/ |
| D | dcn316_resource.c | 909 .psr = {
1512 if (pool->base.psr != NULL) in dcn316_resource_destruct()
1513 dmub_psr_destroy(&pool->base.psr); in dcn316_resource_destruct()
1960 pool->base.psr = dmub_psr_create(ctx); in dcn316_resource_construct()
1961 if (pool->base.psr == NULL) { in dcn316_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_resource.c | 961 .psr = {
1560 if (pool->base.psr != NULL) in dcn314_resource_destruct()
1561 dmub_psr_destroy(&pool->base.psr); in dcn314_resource_destruct()
2047 pool->base.psr = dmub_psr_create(ctx); in dcn314_resource_construct()
2048 if (pool->base.psr == NULL) { in dcn314_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn315/ |
| D | dcn315_resource.c | 913 .psr = {
1514 if (pool->base.psr != NULL) in dcn315_resource_destruct()
1515 dmub_psr_destroy(&pool->base.psr); in dcn315_resource_destruct()
2058 pool->base.psr = dmub_psr_create(ctx); in dcn315_resource_construct()
2059 if (pool->base.psr == NULL) { in dcn315_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_resource.c | 914 .psr = {
1513 if (pool->base.psr != NULL) in dcn31_resource_destruct()
1514 dmub_psr_destroy(&pool->base.psr); in dcn31_resource_destruct()
2094 pool->base.psr = dmub_psr_create(ctx); in dcn31_resource_construct()
2095 if (pool->base.psr == NULL) { in dcn31_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 749 .psr = {
1203 if (pool->base.psr != NULL) in dcn30_resource_destruct()
1204 dmub_psr_destroy(&pool->base.psr); in dcn30_resource_destruct()
2502 pool->base.psr = dmub_psr_create(ctx); in dcn30_resource_construct()
2504 if (pool->base.psr == NULL) { in dcn30_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 331 struct dmub_psr *psr; member
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| /drivers/gpu/drm/amd/display/dc/dcn321/ |
| D | dcn321_resource.c | 1486 if (pool->base.psr != NULL) in dcn321_resource_destruct()
1487 dmub_psr_destroy(&pool->base.psr); in dcn321_resource_destruct()
1922 pool->base.psr = dmub_psr_create(ctx); in dcn321_resource_construct()
1923 if (pool->base.psr == NULL) { in dcn321_resource_construct()
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| /drivers/net/ethernet/agere/ |
| D | et131x.c | 2186 struct pkt_stat_desc *psr; in nic_rx_pkts() local
2210 psr = (struct pkt_stat_desc *)(rx_local->ps_ring_virtaddr) + in nic_rx_pkts()
2216 len = psr->word1 & 0xFFFF; in nic_rx_pkts()
2217 ring_index = (psr->word1 >> 26) & 0x03; in nic_rx_pkts()
2219 buff_index = (psr->word1 >> 16) & 0x3FF; in nic_rx_pkts()
2220 word0 = psr->word0; in nic_rx_pkts()
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| /drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_resource.c | 1501 if (pool->base.psr != NULL) in dcn32_resource_destruct()
1502 dmub_psr_destroy(&pool->base.psr); in dcn32_resource_destruct()
2369 pool->base.psr = dmub_psr_create(ctx); in dcn32_resource_construct()
2370 if (pool->base.psr == NULL) { in dcn32_resource_construct()
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