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Searched refs:rCCK0_System (Results 1 – 10 of 10) sorted by relevance

/drivers/staging/rtl8712/
Drtl871x_mp.c366 set_bb_reg(pAdapter, rCCK0_System, bCCKSideBand, in r8712_SwitchBandwidth()
508 set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); in r8712_SetSingleCarrierTx()
510 set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, bEnable); in r8712_SetSingleCarrierTx()
580 set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); in r8712_SetCarrierSuppressionTx()
582 set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, in r8712_SetCarrierSuppressionTx()
586 set_bb_reg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); in r8712_SetCarrierSuppressionTx()
591 set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); in r8712_SetCarrierSuppressionTx()
593 set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, in r8712_SetCarrierSuppressionTx()
618 set_bb_reg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); in SetCCKContinuousTx()
620 set_bb_reg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); in SetCCKContinuousTx()
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Drtl871x_mp_phy_regdef.h153 #define rCCK0_System 0xa00 macro
/drivers/staging/rtl8192u/
Dr819xU_phyreg.h45 #define rCCK0_System 0xa00 macro
Dr819xU_phy.c1533 rtl8192_setBBreg(dev, rCCK0_System, bCCKSideBand, in rtl8192_SetBWModeWorkItem()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h95 #define rCCK0_System 0xa00 macro
Dr8192E_phy.c1159 rtl92e_set_bb_reg(dev, rCCK0_System, bCCKSideBand, in _rtl92e_set_bw_mode_work_item()
/drivers/staging/r8188eu/hal/
Drtl8188e_phycfg.c634 rtl8188e_PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); in _PHY_SetBWMode92C()
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h163 #define rCCK0_System 0xa00 macro
/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h119 #define rCCK0_System 0xa00 macro
/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c653 PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); in phy_PostSetBwMode8723B()