Home
last modified time | relevance | path

Searched refs:rFPGA0_XA_LSSIReadBack (Results 1 – 9 of 9) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phyreg.h34 #define rFPGA0_XA_LSSIReadBack 0x8a0 macro
Dr819xU_phy.c664 priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h81 #define rFPGA0_XA_LSSIReadBack 0x8a0 macro
Dr8192E_phy.c444 priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in _rtl92e_init_bb_rf_reg_def()
/drivers/staging/r8188eu/hal/
Drtl8188e_phycfg.c403 pHalData->PHYRegDef.rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in phy_InitBBRFRegisterDefinition()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h129 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ macro
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h138 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Transceiver LSSI Readback */ macro
/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h95 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ macro
/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c329 pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in phy_InitBBRFRegisterDefinition()