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Searched refs:rFPGA0_XB_HSSIParameter1 (Results 1 – 9 of 9) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phyreg.h12 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Dr819xU_phy.c609 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h55 #define rFPGA0_XB_HSSIParameter1 0x828 macro
Dr8192E_phy.c400 priv->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; in _rtl92e_init_bb_rf_reg_def()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h94 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h104 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h66 #define rFPGA0_XB_HSSIParameter1 0x828 macro
/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c135 RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1|MaskforPhySet, BIT8); in phy_RFSerialRead_8723B()
/drivers/staging/r8188eu/hal/
DHalPhyRf_8188e.c552 rtl8188e_PHY_SetBBReg(adapt, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); in _PHY_PIModeSwitch()