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Searched refs:rd_reg32 (Results 1 – 10 of 10) sorted by relevance

/drivers/crypto/caam/
Dctrl.c114 while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) && in run_descriptor_deco0()
123 while (!(rd_reg32(&ctrl->deco_rq) & DECORR_DEN0) && in run_descriptor_deco0()
149 deco_dbg_reg = rd_reg32(&deco->desc_dbg); in run_descriptor_deco0()
155 deco_state = (rd_reg32(&deco->dbg_exec) & in run_descriptor_deco0()
169 *status = rd_reg32(&deco->op_status_hi) & in run_descriptor_deco0()
326 rdsta_val = rd_reg32(&ctrl->r4tst[0].rdsta) & RDSTA_MASK; in instantiate_rng()
376 val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK) in kick_trng()
381 val = rd_reg32(&r4tst->rtsdctl); in kick_trng()
390 val = rd_reg32(&r4tst->rtmctl); in kick_trng()
426 ccbvid = rd_reg32(&ctrl->perfmon.ccb_id); in caam_get_era_from_hw()
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Djr.c88 while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) == in caam_reset_hw_jr()
92 if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) != in caam_reset_hw_jr()
101 while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout) in caam_reset_hw_jr()
177 irqstate = rd_reg32(&jrp->rregs->jrintstatus); in caam_jr_interrupt()
216 (outring_used = rd_reg32(&jrp->rregs->outring_used))) { in caam_jr_dequeue()
425 jrp->inpring_avail = rd_reg32(&jrp->rregs->inpring_avail); in caam_jr_enqueue()
Dcaamprng.c211 rng_inst = (rd_reg32(&priv->jr[0]->perfmon.cha_num_ls) & in caam_prng_register()
214 rng_inst = rd_reg32(&priv->jr[0]->vreg.rng) & CHA_VER_NUM_MASK; in caam_prng_register()
Dcaamrng.c227 rng_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & in caam_rng_init()
230 rng_inst = rd_reg32(&priv->ctrl->vreg.rng) & CHA_VER_NUM_MASK; in caam_rng_init()
Dcaamalg.c3532 cha_vid = rd_reg32(&priv->ctrl->perfmon.cha_id_ls); in caam_algapi_init()
3536 cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls); in caam_algapi_init()
3544 aes_rn = rd_reg32(&priv->ctrl->perfmon.cha_rev_ls) & in caam_algapi_init()
3550 aesa = rd_reg32(&priv->ctrl->vreg.aesa); in caam_algapi_init()
3551 mdha = rd_reg32(&priv->ctrl->vreg.mdha); in caam_algapi_init()
3556 des_inst = rd_reg32(&priv->ctrl->vreg.desa) & CHA_VER_NUM_MASK; in caam_algapi_init()
3559 ccha_inst = rd_reg32(&priv->ctrl->vreg.ccha) & CHA_VER_NUM_MASK; in caam_algapi_init()
3560 ptha_inst = rd_reg32(&priv->ctrl->vreg.ptha) & CHA_VER_NUM_MASK; in caam_algapi_init()
Dcaamalg_qi.c2623 cha_vid = rd_reg32(&priv->ctrl->perfmon.cha_id_ls); in caam_qi_algapi_init()
2627 cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls); in caam_qi_algapi_init()
2635 aesa = rd_reg32(&priv->ctrl->vreg.aesa); in caam_qi_algapi_init()
2636 mdha = rd_reg32(&priv->ctrl->vreg.mdha); in caam_qi_algapi_init()
2641 des_inst = rd_reg32(&priv->ctrl->vreg.desa) & CHA_VER_NUM_MASK; in caam_qi_algapi_init()
Dcaampkc.c1167 pk_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & in caam_pkc_init()
1170 pkha = rd_reg32(&priv->ctrl->vreg.pkha); in caam_pkc_init()
Dcaamhash.c1952 md_vid = (rd_reg32(&priv->ctrl->perfmon.cha_id_ls) & in caam_algapi_hash_init()
1954 md_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) & in caam_algapi_hash_init()
1957 u32 mdha = rd_reg32(&priv->ctrl->vreg.mdha); in caam_algapi_hash_init()
Dregs.h109 static inline u32 rd_reg32(void __iomem *reg) in rd_reg32() function
/drivers/tty/
Dsynclink_gt.c406 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr);
2117 unsigned int status = rd_reg32(info, RDCSR); in isr_rdma()
2143 unsigned int status = rd_reg32(info, TDCSR); in isr_tdma()
2277 while((gsr = rd_reg32(info, GSR) & 0xffffff00)) { in slgt_interrupt()
2298 while ((changed = rd_reg32(info, IOSR)) != 0) { in slgt_interrupt()
2301 state = rd_reg32(info, IOVR); in slgt_interrupt()
2880 data = rd_reg32(info, IODR); in set_gpio()
2886 data = rd_reg32(info, IOVR); in set_gpio()
2904 gpio.state = rd_reg32(info, IOVR); in get_gpio()
2906 gpio.dir = rd_reg32(info, IODR); in get_gpio()
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