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Searched refs:refcyc_h_blank_end (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c356 REFCYC_H_BLANK_END, &dlg_attr.refcyc_h_blank_end, in hubp21_validate_dml_output()
368 if (dlg_attr.refcyc_h_blank_end != dml_dlg_attr->refcyc_h_blank_end) in hubp21_validate_dml_output()
370 dml_dlg_attr->refcyc_h_blank_end, dlg_attr.refcyc_h_blank_end); in hubp21_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c88 REFCYC_H_BLANK_END, dlg_attr->refcyc_h_blank_end, in hubp2_program_deadline()
1137 REFCYC_H_BLANK_END, &dlg_attr->refcyc_h_blank_end, in hubp2_read_state_common()
1442 REFCYC_H_BLANK_END, &dlg_attr.refcyc_h_blank_end, in hubp2_validate_dml_output()
1454 if (dlg_attr.refcyc_h_blank_end != dml_dlg_attr->refcyc_h_blank_end) in hubp2_validate_dml_output()
1456 dml_dlg_attr->refcyc_h_blank_end, dlg_attr.refcyc_h_blank_end); in hubp2_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_rq_dlg_calc_32.c334 dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end * ref_freq_to_pix_freq); in dml32_rq_dlg_get_dlg_reg()
341 dlg_regs->refcyc_h_blank_end = (unsigned int) (((double) hblank_end in dml32_rq_dlg_get_dlg_reg()
345 ASSERT(dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); in dml32_rq_dlg_get_dlg_reg()
/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c197 dlg_regs->refcyc_h_blank_end); in print__dlg_regs_st()
Ddisplay_mode_structs.h618 unsigned int refcyc_h_blank_end; member
Ddml1_display_rq_dlg_calc.c1157 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml1_rq_dlg_get_dlg_params()
1159 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13)); in dml1_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c1217 disp_dlg_regs->refcyc_h_blank_end = (unsigned int)((double) hblank_end * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1221 …disp_dlg_regs->refcyc_h_blank_end = (unsigned int)(((double) hblank_end + odm_pipe_index * (double… in dml_rq_dlg_get_dlg_params()
1223 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c1093 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1097 …disp_dlg_regs->refcyc_h_blank_end = (unsigned int) (((double) hblank_end + odm_pipe_index * (doubl… in dml_rq_dlg_get_dlg_params()
1098 } ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c1200 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1205 …disp_dlg_regs->refcyc_h_blank_end = (unsigned int) (((double) hblank_end + odm_pipe_index * (doubl… in dml_rq_dlg_get_dlg_params()
1206 } ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c595 REFCYC_H_BLANK_END, dlg_attr->refcyc_h_blank_end, in hubp1_program_deadline()
904 REFCYC_H_BLANK_END, &dlg_attr->refcyc_h_blank_end, in hubp1_read_state_common()
Ddcn10_hw_sequencer_debug.c260 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_get_dlg_states()
Ddcn10_hw_sequencer.c240 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_log_hubp_states()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20v2.c934 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml20v2_rq_dlg_get_dlg_params()
936 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13)); in dml20v2_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20.c934 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml20_rq_dlg_get_dlg_params()
936 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13)); in dml20_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c980 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml_rq_dlg_get_dlg_params()
982 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); in dml_rq_dlg_get_dlg_params()