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Searched refs:regCGTS_TCC_DISABLE (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dimu_v11_0_3.c66 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCGTS_TCC_DISABLE, 0x00000001, 0x00000000),
Dgfx_v11_0.c1643 uint32_t tcc_disable = RREG32_SOC15(GC, 0, regCGTS_TCC_DISABLE) | in gfx_v11_0_get_tcc_info()
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h4458 #define regCGTS_TCC_DISABLE … macro
Dgc_11_0_0_offset.h10606 #define regCGTS_TCC_DISABLE … macro
Dgc_11_0_3_offset.h11228 #define regCGTS_TCC_DISABLE … macro