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Searched refs:regCP_CPF_STATUS (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsoc21.c247 { SOC15_REG_ENTRY(GC, 0, regCP_CPF_STATUS)},
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h175 #define regCP_CPF_STATUS … macro
Dgc_11_0_0_offset.h1936 #define regCP_CPF_STATUS … macro
Dgc_11_0_3_offset.h1998 #define regCP_CPF_STATUS … macro