Searched refs:regCP_HQD_ACTIVE (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_amdkfd_gfx_v11.c | 252 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE), data); in hqd_load_v11() 455 act = RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE)); in hqd_is_occupied_v11() 517 temp = RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE)); in hqd_destroy_v11()
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D | mes_v11_0.c | 851 WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, mqd->cp_hqd_active); in mes_v11_0_queue_init_register() 1099 if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) { in mes_v11_0_kiq_dequeue_sched() 1102 if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1)) in mes_v11_0_kiq_dequeue_sched()
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D | gfx_v11_0.c | 3909 WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, 0); in gfx_v11_0_kiq_init_register() 3929 if (RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1) { in gfx_v11_0_kiq_init_register() 3932 if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1)) in gfx_v11_0_kiq_init_register() 4002 WREG32_SOC15(GC, 0, regCP_HQD_ACTIVE, in gfx_v11_0_kiq_init_register() 4551 if (!RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) && in gfx_v11_0_soft_reset()
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/drivers/gpu/drm/amd/include/asic_reg/gc/ |
D | gc_9_4_2_offset.h | 697 #define regCP_HQD_ACTIVE … macro
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D | gc_11_0_0_offset.h | 4604 #define regCP_HQD_ACTIVE … macro
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D | gc_11_0_3_offset.h | 4820 #define regCP_HQD_ACTIVE … macro
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