Searched refs:regCP_INT_CNTL (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v11_0.c | 4505 tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL); in gfx_v11_0_soft_reset()
4510 WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp); in gfx_v11_0_soft_reset()
4605 tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL); in gfx_v11_0_soft_reset()
4610 WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp); in gfx_v11_0_soft_reset()
4943 data = RREG32_SOC15(GC, 0, regCP_INT_CNTL); in gfx_v11_0_update_coarse_grain_clock_gating()
4948 WREG32_SOC15(GC, 0, regCP_INT_CNTL, data); in gfx_v11_0_update_coarse_grain_clock_gating()
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| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 359 #define regCP_INT_CNTL … macro
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| D | gc_11_0_0_offset.h | 4136 #define regCP_INT_CNTL … macro
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| D | gc_11_0_3_offset.h | 4346 #define regCP_INT_CNTL … macro
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