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Searched refs:regGDS_EDC_CNT (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_4_2.c807 { SOC15_REG_ENTRY(GC, 0, regGDS_EDC_CNT), 0, 1, 1 },
916 { "GDS_MEM", SOC15_REG_ENTRY(GC, 0, regGDS_EDC_CNT),
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h1258 #define regGDS_EDC_CNT macro
Dgc_11_0_0_offset.h2318 #define regGDS_EDC_CNT macro
Dgc_11_0_3_offset.h2426 #define regGDS_EDC_CNT macro