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Searched refs:regGDS_GWS_VMID0 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c1612 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, i, 0); in gfx_v11_0_init_compute_vmid()
1630 WREG32_SOC15_OFFSET(GC, 0, regGDS_GWS_VMID0, vmid, 0); in gfx_v11_0_init_gds_vmid()
4698 SOC15_REG_OFFSET(GC, 0, regGDS_GWS_VMID0) + vmid, in gfx_v11_0_ring_emit_gds_switch()
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h1342 #define regGDS_GWS_VMID0 macro
Dgc_11_0_0_offset.h4828 #define regGDS_GWS_VMID0 macro
Dgc_11_0_3_offset.h5044 #define regGDS_GWS_VMID0 macro