Searched refs:regRLC_PG_CNTL (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v11_0.c | 1742 rlc_pg_cntl = RREG32_SOC15(GC, 0, regRLC_PG_CNTL); in gfx_v11_0_rlc_smu_handshake_cntl()
1756 WREG32_SOC15(GC, 0, regRLC_PG_CNTL, rlc_pg_cntl); in gfx_v11_0_rlc_smu_handshake_cntl()
1945 WREG32_SOC15(GC, 0, regRLC_PG_CNTL, 0); in gfx_v11_0_rlc_resume()
5064 u32 data = RREG32_SOC15(GC, 0, regRLC_PG_CNTL); in gfx_v11_cntl_power_gating()
5071 WREG32_SOC15(GC, 0, regRLC_PG_CNTL, data); in gfx_v11_cntl_power_gating()
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| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 4968 #define regRLC_PG_CNTL … macro
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| D | gc_11_0_0_offset.h | 9878 #define regRLC_PG_CNTL … macro
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| D | gc_11_0_3_offset.h | 10482 #define regRLC_PG_CNTL … macro
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