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Searched refs:regRLC_SRM_CNTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c1775 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL)); in gfx_v11_0_rlc_enable_srm()
1778 WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp); in gfx_v11_0_rlc_enable_srm()
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h5068 #define regRLC_SRM_CNTL … macro
Dgc_11_0_0_offset.h9956 #define regRLC_SRM_CNTL … macro
Dgc_11_0_3_offset.h10560 #define regRLC_SRM_CNTL … macro