Searched refs:regSQ_EDC_CNT (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_4_2.c | 823 { SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT), 0, 8, 14 },
1135 { "SQ_LDS_D", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
1138 { "SQ_LDS_I", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
1141 { "SQ_SGPR", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
1144 { "SQ_VGPR0", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
1147 { "SQ_VGPR1", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
1150 { "SQ_VGPR2", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
1153 { "SQ_VGPR3", SOC15_REG_ENTRY(GC, 0, regSQ_EDC_CNT),
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| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_2_offset.h | 6302 #define regSQ_EDC_CNT … macro
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