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Searched refs:regWD_UTCL1_CNTL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h3596 #define regWD_UTCL1_CNTL … macro
Dgc_11_0_0_offset.h2064 #define regWD_UTCL1_CNTL … macro
Dgc_11_0_3_offset.h2126 #define regWD_UTCL1_CNTL … macro