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Searched refs:rt2x00mmio_register_write (Results 1 – 7 of 7) sorted by relevance

/drivers/net/wireless/ralink/rt2x00/
Drt2800mmio.c209 rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg); in rt2800mmio_enable_interrupt()
242 rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800mmio_tbtt_tasklet()
247 rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800mmio_tbtt_tasklet()
333 rt2x00mmio_register_write(rt2x00dev, INT_SOURCE_CSR, reg); in rt2800mmio_interrupt()
374 rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg); in rt2800mmio_interrupt()
393 rt2x00mmio_register_write(rt2x00dev, INT_SOURCE_CSR, reg); in rt2800mmio_toggle_irq()
405 rt2x00mmio_register_write(rt2x00dev, INT_MASK_CSR, reg); in rt2800mmio_toggle_irq()
433 rt2x00mmio_register_write(rt2x00dev, MAC_SYS_CTRL, reg); in rt2800mmio_start_queue()
440 rt2x00mmio_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800mmio_start_queue()
444 rt2x00mmio_register_write(rt2x00dev, INT_TIMER_EN, reg); in rt2800mmio_start_queue()
[all …]
Drt61pci.c72 rt2x00mmio_register_write(rt2x00dev, PHY_CSR3, reg); in rt61pci_bbp_write()
100 rt2x00mmio_register_write(rt2x00dev, PHY_CSR3, reg); in rt61pci_bbp_read()
130 rt2x00mmio_register_write(rt2x00dev, PHY_CSR4, reg); in rt61pci_rf_write()
154 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, reg); in rt61pci_mcu_request()
159 rt2x00mmio_register_write(rt2x00dev, HOST_CMD_CSR, reg); in rt61pci_mcu_request()
193 rt2x00mmio_register_write(rt2x00dev, E2PROM_CSR, reg); in rt61pci_eepromregister_write()
201 .write = rt2x00mmio_register_write,
289 rt2x00mmio_register_write(led->rt2x00dev, MAC_CSR14, reg); in rt61pci_blink_set()
379 rt2x00mmio_register_write(rt2x00dev, SEC_CSR4, reg); in rt61pci_config_pairwise_key()
407 rt2x00mmio_register_write(rt2x00dev, SEC_CSR2, reg); in rt61pci_config_pairwise_key()
[all …]
Drt2400pci.c63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_write()
91 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_read()
121 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2400pci_rf_write()
155 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2400pci_eepromregister_write()
163 .write = rt2x00mmio_register_write,
217 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2400pci_brightness_set()
231 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2400pci_blink_set()
274 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2400pci_config_filter()
292 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2400pci_config_intf()
299 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2400pci_config_intf()
[all …]
Drt2500pci.c63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_write()
91 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_read()
121 rt2x00mmio_register_write(rt2x00dev, RFCSR, reg); in rt2500pci_rf_write()
155 rt2x00mmio_register_write(rt2x00dev, CSR21, reg); in rt2500pci_eepromregister_write()
163 .write = rt2x00mmio_register_write,
217 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_brightness_set()
231 rt2x00mmio_register_write(led->rt2x00dev, LEDCSR, reg); in rt2500pci_blink_set()
278 rt2x00mmio_register_write(rt2x00dev, RXCSR0, reg); in rt2500pci_config_filter()
298 rt2x00mmio_register_write(rt2x00dev, BCNCSR1, reg); in rt2500pci_config_intf()
305 rt2x00mmio_register_write(rt2x00dev, CSR14, reg); in rt2500pci_config_intf()
[all …]
Drt2800pci.c75 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0); in rt2800pci_mcu_status()
76 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); in rt2800pci_mcu_status()
106 rt2x00mmio_register_write(rt2x00dev, E2PROM_CSR, reg); in rt2800pci_eepromregister_write()
176 rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, reg); in rt2800pci_write_firmware()
184 rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000); in rt2800pci_write_firmware()
185 rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001); in rt2800pci_write_firmware()
187 rt2x00mmio_register_write(rt2x00dev, H2M_BBP_AGENT, 0); in rt2800pci_write_firmware()
188 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); in rt2800pci_write_firmware()
205 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0); in rt2800pci_enable_radio()
206 rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); in rt2800pci_enable_radio()
[all …]
Drt2800soc.c45 rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0); in rt2800soc_disable_radio()
51 rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, reg); in rt2800soc_disable_radio()
165 .register_write = rt2x00mmio_register_write,
166 .register_write_lock = rt2x00mmio_register_write, /* same for SoCs */
Drt2x00mmio.h34 static inline void rt2x00mmio_register_write(struct rt2x00_dev *rt2x00dev, in rt2x00mmio_register_write() function