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Searched refs:rv770 (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770.c1202 rdev->config.rv770.tiling_group_size = 256; in rv770_gpu_init()
1205 rdev->config.rv770.max_pipes = 4; in rv770_gpu_init()
1206 rdev->config.rv770.max_tile_pipes = 8; in rv770_gpu_init()
1207 rdev->config.rv770.max_simds = 10; in rv770_gpu_init()
1208 rdev->config.rv770.max_backends = 4; in rv770_gpu_init()
1209 rdev->config.rv770.max_gprs = 256; in rv770_gpu_init()
1210 rdev->config.rv770.max_threads = 248; in rv770_gpu_init()
1211 rdev->config.rv770.max_stack_entries = 512; in rv770_gpu_init()
1212 rdev->config.rv770.max_hw_contexts = 8; in rv770_gpu_init()
1213 rdev->config.rv770.max_gs_threads = 16 * 2; in rv770_gpu_init()
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Drv740_dpm.c124 u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl; in rv740_populate_sclk_value()
125 u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv740_populate_sclk_value()
126 u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv740_populate_sclk_value()
127 u32 cg_spll_spread_spectrum = pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv740_populate_sclk_value()
128 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv740_populate_sclk_value()
190 u32 mpll_ad_func_cntl = pi->clk_regs.rv770.mpll_ad_func_cntl; in rv740_populate_mclk_value()
191 u32 mpll_ad_func_cntl_2 = pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv740_populate_mclk_value()
192 u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl; in rv740_populate_mclk_value()
193 u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv740_populate_mclk_value()
194 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv740_populate_mclk_value()
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Drv770_dpm.c394 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_mclk_value()
396 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_mclk_value()
398 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_mclk_value()
400 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()
402 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv770_populate_mclk_value()
403 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv770_populate_mclk_value()
492 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_sclk_value()
494 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_sclk_value()
496 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_sclk_value()
498 pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv770_populate_sclk_value()
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Dcypress_dpm.c480 pi->clk_regs.rv770.mpll_ad_func_cntl; in cypress_populate_mclk_value()
482 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in cypress_populate_mclk_value()
484 pi->clk_regs.rv770.mpll_dq_func_cntl; in cypress_populate_mclk_value()
486 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in cypress_populate_mclk_value()
488 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in cypress_populate_mclk_value()
490 pi->clk_regs.rv770.dll_cntl; in cypress_populate_mclk_value()
491 u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1; in cypress_populate_mclk_value()
492 u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2; in cypress_populate_mclk_value()
1247 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl); in cypress_populate_smc_initial_state()
1249 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2); in cypress_populate_smc_initial_state()
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Dradeon_kms.c313 *value = rdev->config.rv770.tile_config; in radeon_info_ioctl()
370 *value = rdev->config.rv770.max_backends; in radeon_info_ioctl()
387 *value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()
407 *value = rdev->config.rv770.backend_map; in radeon_info_ioctl()
436 *value = rdev->config.rv770.max_pipes; in radeon_info_ioctl()
573 *value = rdev->config.rv770.active_simds; in radeon_info_ioctl()
DMakefile41 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
Drv770_dpm.h61 struct rv770_clock_registers rv770; member
Dr600_cs.c2285 track->npipes = p->rdev->config.rv770.tiling_npipes; in r600_cs_parse()
2286 track->nbanks = p->rdev->config.rv770.tiling_nbanks; in r600_cs_parse()
2287 track->group_size = p->rdev->config.rv770.tiling_group_size; in r600_cs_parse()
Dradeon.h2225 struct rv770_asic rv770; member
Dr600.c2701 radeon_ring_write(ring, rdev->config.rv770.max_hw_contexts - 1); in r600_cp_start()
/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.h527 struct rv770_clock_registers rv770; member