| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-mediatek.c | 71 u32 rx_delay; member
151 mac_delay->rx_delay /= 550; in mt2712_delay_ps2stage()
159 mac_delay->rx_delay /= 170; in mt2712_delay_ps2stage()
176 mac_delay->rx_delay *= 550; in mt2712_delay_stage2ps()
184 mac_delay->rx_delay *= 170; in mt2712_delay_stage2ps()
205 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
206 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
216 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
217 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
235 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
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| D | dwmac-rk.c | 31 int tx_delay, int rx_delay);
80 int rx_delay; member
184 int tx_delay, int rx_delay) in rk3128_set_to_rgmii() argument
197 DELAY_ENABLE(RK3128, tx_delay, rx_delay) | in rk3128_set_to_rgmii()
198 RK3128_GMAC_CLK_RX_DL_CFG(rx_delay) | in rk3128_set_to_rgmii()
300 int tx_delay, int rx_delay) in rk3228_set_to_rgmii() argument
312 DELAY_ENABLE(RK3228, tx_delay, rx_delay)); in rk3228_set_to_rgmii()
315 RK3228_GMAC_CLK_RX_DL_CFG(rx_delay) | in rk3228_set_to_rgmii()
422 int tx_delay, int rx_delay) in rk3288_set_to_rgmii() argument
435 DELAY_ENABLE(RK3288, tx_delay, rx_delay) | in rk3288_set_to_rgmii()
[all …]
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| D | dwmac-ingenic.c | 63 int rx_delay; member
214 if (mac->rx_delay == 0) in x2000_mac_set_mode()
218 FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac->rx_delay + 9750) / 19500 - 1); in x2000_mac_set_mode()
284 mac->rx_delay = rx_delay_ps * 1000; in ingenic_mac_probe()
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| /drivers/net/dsa/sja1105/ |
| D | sja1105_clocking.c | 513 int rx_delay = priv->rgmii_rx_delay_ps[port]; in sja1105pqrs_setup_rgmii_delay() local
518 if (rx_delay) in sja1105pqrs_setup_rgmii_delay()
519 pad_mii_id.rxc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(rx_delay); in sja1105pqrs_setup_rgmii_delay()
536 if (rx_delay) { in sja1105pqrs_setup_rgmii_delay()
555 int rx_delay = priv->rgmii_rx_delay_ps[port]; in sja1110_setup_rgmii_delay() local
562 if (rx_delay) { in sja1110_setup_rgmii_delay()
563 pad_mii_id.rxc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(rx_delay); in sja1110_setup_rgmii_delay()
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| D | sja1105_main.c | 1136 int rx_delay = -1, tx_delay = -1; in sja1105_parse_rgmii_delays() local
1141 of_property_read_u32(port_dn, "rx-internal-delay-ps", &rx_delay); in sja1105_parse_rgmii_delays()
1144 if (rx_delay == -1 && tx_delay == -1 && priv->fixed_link[port]) { in sja1105_parse_rgmii_delays()
1153 rx_delay = 2000; in sja1105_parse_rgmii_delays()
1160 if (rx_delay < 0) in sja1105_parse_rgmii_delays()
1161 rx_delay = 0; in sja1105_parse_rgmii_delays()
1165 if ((rx_delay || tx_delay) && !priv->info->setup_rgmii_delay) { in sja1105_parse_rgmii_delays()
1170 if ((rx_delay && rx_delay < SJA1105_RGMII_DELAY_MIN_PS) || in sja1105_parse_rgmii_delays()
1172 (rx_delay > SJA1105_RGMII_DELAY_MAX_PS) || in sja1105_parse_rgmii_delays()
1180 priv->rgmii_rx_delay_ps[port] = rx_delay; in sja1105_parse_rgmii_delays()
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| /drivers/staging/octeon/ |
| D | ethernet.c | 645 bool rx_delay; in cvm_set_rgmii_delay() local
651 rx_delay = true; in cvm_set_rgmii_delay()
656 rx_delay = delay_value > 0; in cvm_set_rgmii_delay()
663 if (!rx_delay && !tx_delay) in cvm_set_rgmii_delay()
665 else if (!rx_delay) in cvm_set_rgmii_delay()
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| /drivers/phy/microchip/ |
| D | lan966x_serdes.c | 399 bool rx_delay = false; in lan966x_rgmii_setup() local
414 rx_delay = true; in lan966x_rgmii_setup()
422 HSIO_DLL_CFG_DLL_ENA_SET(rx_delay), in lan966x_rgmii_setup()
427 lan_rmw(HSIO_DLL_CFG_DELAY_ENA_SET(rx_delay), in lan966x_rgmii_setup()
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| /drivers/net/phy/ |
| D | nxp-c45-tja11xx.c | 224 u32 rx_delay; member
1111 u64 rx_delay = priv->rx_delay; in nxp_c45_set_delays() local
1126 degree = div_u64(rx_delay, PS_PER_DEGREE); in nxp_c45_set_delays()
1160 &priv->rx_delay); in nxp_c45_get_delays()
1162 priv->rx_delay = DEFAULT_ID_PS; in nxp_c45_get_delays()
1164 ret = nxp_c45_check_delay(phydev, priv->rx_delay); in nxp_c45_get_delays()
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| /drivers/isdn/mISDN/ |
| D | dsp_cmx.c | 1758 if (delay < dsp->rx_delay[0])
1759 dsp->rx_delay[0] = delay;
1769 delay = dsp->rx_delay[0];
1772 if (delay > dsp->rx_delay[i])
1773 delay = dsp->rx_delay[i];
1834 dsp->rx_delay[i] = dsp->rx_delay[i - 1];
1839 dsp->rx_delay[0] = CMX_BUFF_HALF; /* (infinite) delay */
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| D | dsp.h | 202 int rx_delay[MAX_SECONDS_JITTER_CHECK]; member
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| /drivers/net/dsa/microchip/ |
| D | ksz_common.c | 2861 int rx_delay = -1, tx_delay = -1; in ksz_parse_rgmii_delay() local
2866 of_property_read_u32(port_dn, "rx-internal-delay-ps", &rx_delay); in ksz_parse_rgmii_delay()
2869 if (rx_delay == -1 && tx_delay == -1) { in ksz_parse_rgmii_delay()
2878 rx_delay = 2000; in ksz_parse_rgmii_delay()
2885 if (rx_delay < 0) in ksz_parse_rgmii_delay()
2886 rx_delay = 0; in ksz_parse_rgmii_delay()
2890 dev->ports[port_num].rgmii_rx_val = rx_delay; in ksz_parse_rgmii_delay()
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| /drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_main.h | 233 u8 rx_delay; member
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| D | xgene_enet_hw.c | 491 CFG_RXCLK_MUXSEL0_SET(&rgmii, pdata->rx_delay); in xgene_gmac_set_speed()
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| D | xgene_enet_main.c | 1607 pdata->rx_delay = 2; in xgene_get_rx_delay()
1616 pdata->rx_delay = delay; in xgene_get_rx_delay()
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| /drivers/net/dsa/realtek/ |
| D | rtl8365mb.c | 882 int rx_delay = 0; in rtl8365mb_ext_config_rgmii() local
928 rx_delay = val; in rtl8365mb_ext_config_rgmii()
939 FIELD_PREP(RTL8365MB_EXT_RGMXF_RXDELAY_MASK, rx_delay)); in rtl8365mb_ext_config_rgmii()
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| /drivers/net/wireless/ath/ath9k/ |
| D | ar9003_calib.c | 1401 u32 rx_delay = 0; in ar9003_hw_init_cal_pcoem() local
1478 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY); in ar9003_hw_init_cal_pcoem()
1501 REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay); in ar9003_hw_init_cal_pcoem()
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