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Searched refs:sblk (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_sspp.c144 const struct dpu_sspp_sub_blks *sblk; in _sspp_subblk_offset() local
146 if (!ctx || !ctx->cap || !ctx->cap->sblk) in _sspp_subblk_offset()
149 sblk = ctx->cap->sblk; in _sspp_subblk_offset()
153 *idx = sblk->src_blk.base; in _sspp_subblk_offset()
158 *idx = sblk->scaler_blk.base; in _sspp_subblk_offset()
162 *idx = sblk->csc_blk.base; in _sspp_subblk_offset()
429 ctx->cap->sblk->scaler_blk.version, in _dpu_hw_sspp_setup_scaler3()
701 const struct dpu_sspp_sub_blks *sblk = cfg->sblk; in _dpu_hw_sspp_init_debugfs() local
718 sblk->src_blk.base + cfg->base, in _dpu_hw_sspp_init_debugfs()
719 sblk->src_blk.len, in _dpu_hw_sspp_init_debugfs()
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Ddpu_hw_lm.c59 const struct dpu_lm_sub_blks *sblk = ctx->cap->sblk; in _stage_offset() local
60 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
61 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
Ddpu_hw_catalog.h557 const struct dpu_sspp_sub_blks *sblk; member
574 const struct dpu_lm_sub_blks *sblk; member
590 const struct dpu_dspp_sub_blks *sblk; member
607 const struct dpu_pingpong_sub_blks *sblk; member
620 const struct dpu_merge_3d_sub_blks *sblk; member
Ddpu_plane.c381 pipe_qos_cfg.creq_vblank = pdpu->pipe_hw->cap->sblk->creq_vblank; in _dpu_plane_set_qos_ctrl()
383 pdpu->pipe_hw->cap->sblk->danger_vblank; in _dpu_plane_set_qos_ctrl()
935 const struct dpu_sspp_sub_blks *sblk, in dpu_plane_check_inline_rotation() argument
941 if (!sblk->rotation_cfg) { in dpu_plane_check_inline_rotation()
946 if (drm_rect_width(&src) > sblk->rotation_cfg->rot_maxheight) { in dpu_plane_check_inline_rotation()
948 src.y2, sblk->rotation_cfg->rot_maxheight); in dpu_plane_check_inline_rotation()
952 supported_formats = sblk->rotation_cfg->rot_format_list; in dpu_plane_check_inline_rotation()
953 num_formats = sblk->rotation_cfg->rot_num_formats; in dpu_plane_check_inline_rotation()
977 const struct dpu_sspp_sub_blks *sblk = pdpu->pipe_hw->cap->sblk; in dpu_plane_atomic_check() local
983 min_scale = FRAC_16_16(1, sblk->maxupscale); in dpu_plane_atomic_check()
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Ddpu_hw_dspp.c36 base = ctx->cap->sblk->pcc.base; in dpu_setup_dspp_pcc()
Ddpu_hw_catalog.c800 .sblk = &_sblk, \
933 .sblk = _sblk, \
1074 .sblk = _sblk \
1131 .sblk = &_sblk, \
1141 .sblk = &_sblk, \
1208 .sblk = NULL \
Ddpu_hw_pingpong.c70 base = pp->caps->sblk->dither.base; in dpu_hw_pp_setup_dither()
Ddpu_hw_ctl.c77 stages = mixer[i].sblk->maxblendstages; in _mixer_stages()
/drivers/net/ethernet/broadcom/
Dbnx2.c889 struct status_block_msix *sblk; in bnx2_alloc_mem() local
893 sblk = (bp->status_blk + BNX2_SBLK_MSIX_ALIGN_SIZE * i); in bnx2_alloc_mem()
894 bnapi->status_blk.msix = sblk; in bnx2_alloc_mem()
896 &sblk->status_tx_quick_consumer_index; in bnx2_alloc_mem()
898 &sblk->status_rx_quick_consumer_index; in bnx2_alloc_mem()
2798 struct status_block *sblk = bnapi->status_blk.msi; in bnx2_phy_event_is_set() local
2802 new_link_state = sblk->status_attn_bits & event; in bnx2_phy_event_is_set()
2803 old_link_state = sblk->status_attn_bits_ack & event; in bnx2_phy_event_is_set()
3351 struct status_block *sblk = bnapi->status_blk.msi; in bnx2_interrupt() local
3359 if ((sblk->status_idx == bnapi->last_status_idx) && in bnx2_interrupt()
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Dcnic.c3004 struct status_block *sblk = status_blk; in cnic_service_bnx2() local
3006 return sblk->status_idx; in cnic_service_bnx2()
4479 struct status_block *sblk = cp->status_blk.gen; in cnic_init_bnx2_irq() local
4483 while (sblk->status_completion_producer_index && i < 10) { in cnic_init_bnx2_irq()
4490 if (sblk->status_completion_producer_index) in cnic_init_bnx2_irq()
4543 struct status_block_msix *sblk = cp->status_blk.bnx2; in cnic_init_bnx2_tx_ring() local
4548 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index; in cnic_init_bnx2_tx_ring()
4611 struct status_block_msix *sblk = cp->status_blk.bnx2; in cnic_init_bnx2_rx_ring() local
4613 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index; in cnic_init_bnx2_rx_ring()
4710 struct status_block *sblk = cp->status_blk.gen; in cnic_start_bnx2_hw() local
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Dtg3.c1040 struct tg3_hw_status *sblk = tnapi->hw_status; in tg3_has_work() local
1045 if (sblk->status & SD_STATUS_LINK_CHG) in tg3_has_work()
1050 if (sblk->idx[0].tx_consumer != tnapi->tx_cons) in tg3_has_work()
7021 struct tg3_hw_status *sblk = tp->napi[0].hw_status; in tg3_poll_link() local
7023 if (sblk->status & SD_STATUS_LINK_CHG) { in tg3_poll_link()
7024 sblk->status = SD_STATUS_UPDATED | in tg3_poll_link()
7025 (sblk->status & ~SD_STATUS_LINK_CHG); in tg3_poll_link()
7234 struct tg3_hw_status *sblk = tnapi->hw_status; in tg3_poll_msix() local
7249 tnapi->last_tag = sblk->status_tag; in tg3_poll_msix()
7254 if (likely(sblk->idx[0].tx_consumer == tnapi->tx_cons && in tg3_poll_msix()
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