Searched refs:sc_hiz_tile_fifo_size (Results 1 – 14 of 14) sorted by relevance
1221 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1241 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1265 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1285 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1461 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | in rv770_gpu_init()
3176 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3198 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3220 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3243 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3265 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3293 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3315 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3337 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3359 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3381 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()[all …]
2082 unsigned sc_hiz_tile_fifo_size; member2109 unsigned sc_hiz_tile_fifo_size; member2137 unsigned sc_hiz_tile_fifo_size; member2170 unsigned sc_hiz_tile_fifo_size; member2201 unsigned sc_hiz_tile_fifo_size; member
911 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()985 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()1188 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_hiz_tile_fifo_size) | in cayman_gpu_init()
3111 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3128 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3146 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3163 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3180 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3315 SC_HIZ_TILE_FIFO_SIZE(rdev->config.si.sc_hiz_tile_fifo_size) | in si_gpu_init()
3190 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3207 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3224 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3243 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3378 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cik.sc_hiz_tile_fifo_size) | in cik_gpu_init()
148 unsigned sc_hiz_tile_fifo_size; member
1598 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1615 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1632 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1649 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1666 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1747 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v6_0_constants_init()
1701 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1718 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1733 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1748 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1765 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1782 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1799 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1816 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()3824 (adev->gfx.config.sc_hiz_tile_fifo_size << in gfx_v8_0_constants_init()
2016 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v7_0_constants_init()4263 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4280 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4297 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4316 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()
1929 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()1937 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()1947 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()1962 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()1974 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()1984 adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; in gfx_v9_0_gpu_early_init()1995 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()
740 config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size; in amdgpu_debugfs_gca_config_read()
868 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v11_0_gpu_early_init()876 adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; in gfx_v11_0_gpu_early_init()
4465 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4480 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4491 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v10_0_gpu_early_init()