Searched refs:sck (Results 1 – 7 of 7) sorted by relevance
/drivers/hwmon/ |
D | sht15.c | 150 struct gpio_desc *sck; member 211 gpiod_set_value(data->sck, 0); in sht15_connection_reset() 214 gpiod_set_value(data->sck, 1); in sht15_connection_reset() 216 gpiod_set_value(data->sck, 0); in sht15_connection_reset() 231 gpiod_set_value(data->sck, 1); in sht15_send_bit() 233 gpiod_set_value(data->sck, 0); in sht15_send_bit() 254 gpiod_set_value(data->sck, 0); in sht15_transmission_start() 256 gpiod_set_value(data->sck, 1); in sht15_transmission_start() 260 gpiod_set_value(data->sck, 0); in sht15_transmission_start() 262 gpiod_set_value(data->sck, 1); in sht15_transmission_start() [all …]
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/drivers/clk/at91/ |
D | at91sam9260.c | 10 struct sck { struct 27 const struct sck *sck; member 75 static const struct sck at91sam9260_systemck[] = { 116 .sck = at91sam9260_systemck, 174 .sck = at91sam9260_systemck, 216 static const struct sck at91sam9261_systemck[] = { 255 .sck = at91sam9261_systemck, 280 static const struct sck at91sam9263_systemck[] = { 322 .sck = at91sam9263_systemck, 358 ndck(data->sck, data->num_sck), in at91sam926x_pmc_setup() [all …]
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D | at91rm9200.c | 12 struct sck { struct 42 static const struct sck at91rm9200_systemck[] = {
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/drivers/spi/ |
D | spi-gpio.c | 35 struct gpio_desc *sck; member 91 gpiod_set_value_cansleep(spi_gpio->sck, is_on); in setsck() 229 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); in spi_gpio_chipselect() 293 gpiod_set_value_cansleep(spi_gpio->sck, in spi_gpio_set_direction() 295 gpiod_set_value_cansleep(spi_gpio->sck, in spi_gpio_set_direction() 326 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); in spi_gpio_request() 327 return PTR_ERR_OR_ZERO(spi_gpio->sck); in spi_gpio_request()
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D | spi-mxs.c | 60 unsigned int sck; /* Rate requested (vs actual) */ member 75 if (hz != spi->sck) { in mxs_spi_setup_transfer() 82 spi->sck = hz; in mxs_spi_setup_transfer()
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D | spi-pic32-sqi.c | 165 static int pic32_sqi_set_clk_rate(struct pic32_sqi *sqi, u32 sck) in pic32_sqi_set_clk_rate() argument 170 div = clk_get_rate(sqi->base_clk) / (2 * sck); in pic32_sqi_set_clk_rate()
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/drivers/pinctrl/renesas/ |
D | pfc-r8a7778.c | 1336 #define SCIF_PFC_CLK(name, sck) SH_PFC_MUX1(name, sck) argument 1588 #define SSI_PFC_CTRL(name, sck, ws) SH_PFC_MUX2(name, sck, ws) argument
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