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Searched refs:sh_mem_ape1_limit (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/amdkfd/
Dkfd_pm4_headers.h77 uint32_t sh_mem_ape1_limit; member
128 uint32_t sh_mem_ape1_limit; member
Dkfd_device_queue_manager_cik.c131 qpd->sh_mem_ape1_limit = 0; in update_qpd_cik()
165 qpd->sh_mem_ape1_limit = 0; in update_qpd_cik_hawaii()
Dkfd_device_queue_manager_vi.c171 qpd->sh_mem_ape1_limit = 0; in update_qpd_vi()
213 qpd->sh_mem_ape1_limit = 0; in update_qpd_vi_tonga()
Dkfd_device_queue_manager_v11.c65 qpd->sh_mem_ape1_limit = 0; in update_qpd_v11()
Dkfd_device_queue_manager_v10.c65 qpd->sh_mem_ape1_limit = 0; in update_qpd_v10()
Dkfd_device_queue_manager_v9.c79 qpd->sh_mem_ape1_limit = 0; in update_qpd_v9()
Dkfd_packet_manager_vi.c65 packet->sh_mem_ape1_limit = qpd->sh_mem_ape1_limit; in pm_map_process_vi()
Dkfd_pm4_headers_vi.h175 uint32_t sh_mem_ape1_limit; member
Dkfd_device_queue_manager.c134 qpd->sh_mem_ape1_limit, in program_sh_mem_settings()
1953 qpd->sh_mem_ape1_limit = 0; in set_cache_memory_policy()
1975 qpd->sh_mem_ape1_limit = limit >> 16; in set_cache_memory_policy()
1991 qpd->sh_mem_ape1_limit); in set_cache_memory_policy()
Dkfd_priv.h642 uint32_t sh_mem_ape1_limit; member
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v9.h27 uint32_t sh_mem_ape1_base, uint32_t sh_mem_ape1_limit,
Damdgpu_amdkfd_gfx_v7.c80 uint32_t sh_mem_ape1_limit, in kgd_program_sh_mem_settings() argument
87 WREG32(mmSH_MEM_APE1_LIMIT, sh_mem_ape1_limit); in kgd_program_sh_mem_settings()
Damdgpu_amdkfd_gfx_v8.c74 uint32_t sh_mem_ape1_limit, in kgd_program_sh_mem_settings() argument
81 WREG32(mmSH_MEM_APE1_LIMIT, sh_mem_ape1_limit); in kgd_program_sh_mem_settings()
Damdgpu_amdkfd_gfx_v10.c81 uint32_t sh_mem_ape1_limit, in kgd_program_sh_mem_settings() argument
Damdgpu_amdkfd_gfx_v11.c80 uint32_t sh_mem_ape1_limit, in program_sh_mem_settings_v11() argument
Damdgpu_amdkfd_gfx_v9.c88 uint32_t sh_mem_ape1_limit, in kgd_gfx_v9_program_sh_mem_settings() argument
Damdgpu_amdkfd_gfx_v10_3.c82 uint32_t sh_mem_ape1_limit, in program_sh_mem_settings_v10_3() argument
/drivers/gpu/drm/amd/include/
Dkgd_kfd_interface.h233 uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);