| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | dcn20_fpu.c | 228 .socclk_mhz = 560.0,
239 .socclk_mhz = 694.0,
250 .socclk_mhz = 875.0,
261 .socclk_mhz = 1000.0,
272 .socclk_mhz = 1200.0,
284 .socclk_mhz = 1200.0,
339 .socclk_mhz = 560.0,
350 .socclk_mhz = 694.0,
361 .socclk_mhz = 875.0,
372 .socclk_mhz = 1000.0,
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| D | dcn301_fpu.c | 118 .socclk_mhz = 278.0,
130 .socclk_mhz = 278.0,
142 .socclk_mhz = 278.0,
154 .socclk_mhz = 715.0,
166 .socclk_mhz = 953.0,
305 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
354 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn301_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| D | dcn302_fpu.c | 323 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn302_fpu_update_bw_bounding_box()
324 dcn3_02_soc.clock_limits[i].socclk_mhz = dcn3_02_soc.clock_limits[i-1].socclk_mhz; in dcn302_fpu_update_bw_bounding_box()
326 dcn3_02_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn302_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| D | dcn303_fpu.c | 318 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn303_fpu_update_bw_bounding_box()
319 dcn3_03_soc.clock_limits[i].socclk_mhz = dcn3_03_soc.clock_limits[i-1].socclk_mhz; in dcn303_fpu_update_bw_bounding_box()
321 dcn3_03_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn303_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | dcn31_fpu.c | 505 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
623 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn31_update_bw_bounding_box()
695 dcn3_15_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn315_update_bw_bounding_box()
784 s[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn316_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| D | dcn321_fpu.c | 116 .socclk_mhz = 1200.0,
678 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn321_update_bw_bounding_box_fpu()
679 dcn3_21_soc.clock_limits[i].socclk_mhz = dcn3_21_soc.clock_limits[i-1].socclk_mhz; in dcn321_update_bw_bounding_box_fpu()
681 dcn3_21_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn321_update_bw_bounding_box_fpu()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| D | dcn314_clk_mgr.c | 630 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i]; in dcn314_clk_mgr_helper_populate_bw_params()
646 …bw_params->clk_table.entries[i].socclk_mhz = find_max_clk_value(clock_table->SocClocks, NUM_SOCCLK… in dcn314_clk_mgr_helper_populate_bw_params()
656 …bw_params->clk_table.entries[i].socclk_mhz = find_max_clk_value(clock_table->SocClocks, NUM_SOCCLK… in dcn314_clk_mgr_helper_populate_bw_params()
676 if (!bw_params->clk_table.entries[i].socclk_mhz) in dcn314_clk_mgr_helper_populate_bw_params()
677 bw_params->clk_table.entries[i].socclk_mhz = def_max.socclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 583 .socclk_mhz = 0,
590 .socclk_mhz = 0,
597 .socclk_mhz = 0,
604 .socclk_mhz = 0,
669 bw_params->clk_table.entries[i].socclk_mhz = find_socclk_for_voltage(clock_table, in rn_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| D | dcn315_clk_mgr.c | 518 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i]; in dcn315_clk_mgr_helper_populate_bw_params()
536 …bw_params->clk_table.entries[i].socclk_mhz = find_max_clk_value(clock_table->SocClocks, NUM_SOCCLK… in dcn315_clk_mgr_helper_populate_bw_params()
555 if (!bw_params->clk_table.entries[i].socclk_mhz) in dcn315_clk_mgr_helper_populate_bw_params()
556 bw_params->clk_table.entries[i].socclk_mhz = def_max.socclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | vg_clk_mgr.c | 502 .socclk_mhz = 0,
509 .socclk_mhz = 0,
516 .socclk_mhz = 0,
523 .socclk_mhz = 0,
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_socbb.h | 30 uint32_t socclk_mhz; member
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| /drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_resource.c | 149 .socclk_mhz = 1254.0,
160 .socclk_mhz = 1254.0,
171 .socclk_mhz = 1254.0,
182 .socclk_mhz = 1254.0,
193 .socclk_mhz = 1254.0,
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_structs.h | 160 double socclk_mhz; member
551 double socclk_mhz; member
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| D | display_mode_lib.c | 283 dml_print("DML PARAMS: socclk_mhz = %3.2f\n", clks_cfg->socclk_mhz); in dml_log_pipe_params()
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| D | display_mode_vba.c | 380 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
396 mode_lib->vba.SOCCLKPerState[i] = soc->clock_limits[i].socclk_mhz; in fetch_socbb_params()
1094 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz; in ModeSupportAndSystemConfiguration()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | dcn32_fpu.c | 117 .socclk_mhz = 1200.0,
564 pipes[0].clks_cfg.socclk_mhz = socclk; in dcn32_set_phantom_stream_timing()
1855 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel_temp].socclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()
1889 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel_temp].socclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()
1918 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn32_calculate_wm_and_dlg_fpu()
2533 if (!bw_params->clk_table.entries[i].socclk_mhz && i > 0) in dcn32_update_bw_bounding_box_fpu()
2534 dcn3_2_soc.clock_limits[i].socclk_mhz = dcn3_2_soc.clock_limits[i-1].socclk_mhz; in dcn32_update_bw_bounding_box_fpu()
2536 dcn3_2_soc.clock_limits[i].socclk_mhz = bw_params->clk_table.entries[i].socclk_mhz; in dcn32_update_bw_bounding_box_fpu()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | dcn314_fpu.c | 237 clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn314_update_bw_bounding_box_fpu()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | dcn30_fpu.c | 397 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn30_fpu_calculate_wm_and_dlg()
623 dcn3_0_soc.clock_limits[i].socclk_mhz = dcn3_0_soc.clock_limits[0].socclk_mhz; in dcn30_fpu_update_bw_bounding_box()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | clk_mgr.h | 89 unsigned int socclk_mhz; member
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| D | dcn30_clk_mgr.c | 144 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn3_init_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| D | dcn316_clk_mgr.c | 549 bw_params->clk_table.entries[i].socclk_mhz = temp; in dcn316_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| D | dcn32_clk_mgr.c | 188 &clk_mgr_base->bw_params->clk_table.entries[0].socclk_mhz, in dcn32_init_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| D | dcn31_clk_mgr.c | 611 …bw_params->clk_table.entries[i].socclk_mhz = find_clk_for_voltage(clock_table, clock_table->SocClo… in dcn31_clk_mgr_helper_populate_bw_params()
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| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calcs.c | 498 input->clks_cfg.socclk_mhz = v->socclk; in dcn_bw_calc_rq_dlg_ttu()
|