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Searched refs:source_sqn (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/diag/
Dfs_tracepoint.c171 PRINT_MASKED_VAL_MISC(u32, source_sqn, source_sqn, p, "%u"); in print_misc_parameters_hdrs()
/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_ste.c739 spec->source_sqn = IFC_GET_CLR(fte_match_set_misc, mask, source_sqn, clr); in dr_ste_copy_mask_misc()
Ddr_ste_v0.c1640 DR_STE_SET_ONES(src_gvmi_qp, bit_mask, source_qp, misc_mask, source_sqn); in dr_ste_v0_build_src_gvmi_qpn_bit_mask()
1656 DR_STE_SET_TAG(src_gvmi_qp, tag, source_qp, misc, source_sqn); in dr_ste_v0_build_src_gvmi_qpn_tag()
Ddr_ste_v1.c1853 DR_STE_SET_ONES(src_gvmi_qp_v1, bit_mask, source_qp, misc_mask, source_sqn); in dr_ste_v1_build_src_gvmi_qpn_bit_mask()
1867 DR_STE_SET_TAG(src_gvmi_qp_v1, tag, source_qp, misc, source_sqn); in dr_ste_v1_build_src_gvmi_qpn_tag()
Ddr_matcher.c315 return (misc->source_sqn || misc->source_port); in dr_mask_is_gvmi_or_qpn_set()
Ddr_types.h620 u32 source_sqn:24; /* Source SQN */ member
/drivers/net/ethernet/mellanox/mlx5/core/
Deswitch_offloads.c1020 MLX5_SET(fte_match_set_misc, misc, source_sqn, sqn); in mlx5_eswitch_add_send_to_vport_rule()
1028 MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_sqn); in mlx5_eswitch_add_send_to_vport_rule()
1644 MLX5_SET_TO_ONES(fte_match_param, match_criteria, misc_parameters.source_sqn); in esw_create_send_to_vport_group()