| /drivers/clk/meson/ |
| D | sclk-div.c | 102 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_round_rate()
127 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_set_duty_cycle()
141 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_get_duty_cycle()
169 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_set_rate()
184 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_recalc_rate()
192 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_enable()
202 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_disable()
210 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_is_enabled()
221 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_init()
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| D | clk-phase.c | 39 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_phase_get_phase()
50 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_phase_set_phase()
83 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_sync()
97 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_get_phase()
109 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_set_phase()
142 struct clk_regmap *clk = to_clk_regmap(hw); in meson_sclk_ws_inv_sync()
155 struct clk_regmap *clk = to_clk_regmap(hw); in meson_sclk_ws_inv_get_phase()
166 struct clk_regmap *clk = to_clk_regmap(hw); in meson_sclk_ws_inv_set_phase()
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| D | clk-regmap.c | 12 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_gate_endisable()
34 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_gate_is_enabled()
62 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_recalc_rate()
81 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_determine_rate()
106 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_set_rate()
138 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_get_parent()
154 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_set_parent()
166 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_determine_rate()
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| D | clk-pll.c | 75 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_recalc_rate()
248 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_determine_rate()
278 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_wait_lock()
295 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_init()
310 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_is_enabled()
333 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_enable()
357 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_disable()
370 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_set_rate()
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| D | clk-mpll.c | 78 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_recalc_rate()
94 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_round_rate()
106 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_set_rate()
134 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_init()
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| D | clk-cpu-dyndiv.c | 22 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_recalc_rate()
34 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_round_rate()
43 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_set_rate()
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| D | clk-dualdiv.c | 50 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_dualdiv_recalc_rate()
92 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_dualdiv_round_rate()
106 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_dualdiv_set_rate()
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| D | vid-pll-div.c | 78 struct clk_regmap *clk = to_clk_regmap(hw); in meson_vid_pll_div_recalc_rate()
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| D | clk-regmap.h | 29 static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw) in to_clk_regmap() function
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| /drivers/clk/qcom/ |
| D | clk-regmap-phy-mux.c | 25 struct clk_regmap *clkr = to_clk_regmap(hw); in phy_mux_is_enabled()
39 struct clk_regmap *clkr = to_clk_regmap(hw); in phy_mux_enable()
49 struct clk_regmap *clkr = to_clk_regmap(hw); in phy_mux_disable()
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| D | clk-regmap-mux.c | 15 return container_of(to_clk_regmap(hw), struct clk_regmap_mux, clkr); in to_clk_regmap_mux()
21 struct clk_regmap *clkr = to_clk_regmap(hw); in mux_get_parent()
39 struct clk_regmap *clkr = to_clk_regmap(hw); in mux_set_parent()
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| D | clk-regmap.c | 24 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_is_enabled_regmap()
50 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_enable_regmap()
74 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_disable_regmap()
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| D | clk-rcg.h | 96 #define to_clk_rcg(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg, clkr)
130 container_of(to_clk_regmap(_hw), struct clk_dyn_rcg, clkr)
157 #define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)
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| D | clk-regmap.h | 28 static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw) in to_clk_regmap() function
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| D | clk-cpu-8996.c | 262 return container_of(to_clk_regmap(hw), struct clk_cpu_8996_pmux, clkr); in to_clk_cpu_8996_pmux_hw()
267 struct clk_regmap *clkr = to_clk_regmap(hw); in clk_cpu_8996_pmux_get_parent()
278 struct clk_regmap *clkr = to_clk_regmap(hw); in clk_cpu_8996_pmux_set_parent()
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| D | clk-branch.h | 46 container_of(to_clk_regmap(_hw), struct clk_branch, clkr)
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| D | clk-hfpll.h | 40 container_of(to_clk_regmap(_hw), struct clk_hfpll, clkr)
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| D | clk-pll.h | 59 #define to_clk_pll(_hw) container_of(to_clk_regmap(_hw), struct clk_pll, clkr)
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| D | clk-regmap-divider.c | 15 return container_of(to_clk_regmap(hw), struct clk_regmap_div, clkr); in to_clk_regmap_div()
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| D | clk-regmap-mux-div.c | 21 container_of(to_clk_regmap(_hw), struct clk_regmap_mux_div, clkr)
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| D | clk-alpha-pll.c | 244 #define to_clk_alpha_pll(_hw) container_of(to_clk_regmap(_hw), \
247 #define to_clk_alpha_pll_postdiv(_hw) container_of(to_clk_regmap(_hw), \
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| D | gcc-ipq4019.c | 28 #define to_clk_regmap_div(_hw) container_of(to_clk_regmap(_hw),\
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| D | mmcc-msm8960.c | 546 container_of(to_clk_regmap(_hw), struct clk_pix_rdi, clkr)
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