Searched refs:uart1_parents (Results 1 – 3 of 3) sorted by relevance
| /drivers/clk/mediatek/ |
| D | clk-mt8516.c | 106 static const char * const uart1_parents[] __initconst = { variable
370 MUX(CLK_TOP_UART1_SEL, "uart1_sel", uart1_parents,
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| D | clk-mt8167.c | 154 static const char * const uart1_parents[] __initconst = { variable
540 MUX(CLK_TOP_UART1_SEL, "uart1_sel", uart1_parents,
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| /drivers/clk/spear/ |
| D | spear1340_clock.c | 421 static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk", variable
654 clk = clk_register_mux(NULL, "uart1_mclk", uart1_parents, in spear1340_clk_init()
655 ARRAY_SIZE(uart1_parents), CLK_SET_RATE_NO_REPARENT, in spear1340_clk_init()
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