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Searched refs:valid_bits (Results 1 – 9 of 9) sorted by relevance

/drivers/media/usb/pvrusb2/
Dpvrusb2-ctrl.c53 mask &= cptr->info->def.type_bitmask.valid_bits; in pvr2_ctrl_set_mask_value()
159 ret = cptr->info->def.type_bitmask.valid_bits; in pvr2_ctrl_get_mask()
209 val &= cptr->info->def.type_bitmask.valid_bits; in pvr2_ctrl_get_valname()
376 const char **names,int valid_bits) in parse_mtoken() argument
382 for (idx = 0, msk = 1; valid_bits; idx++, msk <<= 1) { in parse_mtoken()
383 if (!(msk & valid_bits)) continue; in parse_mtoken()
384 valid_bits &= ~msk; in parse_mtoken()
398 const char **names,int valid_bits) in parse_tlist() argument
425 if (parse_mtoken(ptr,cnt,&kv,names,valid_bits)) { in parse_tlist()
433 mask = valid_bits; in parse_tlist()
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Dpvrusb2-sysfs.c220 int valid_bits, msk; in show_bits() local
223 valid_bits = pvr2_ctrl_get_mask(cip->cptr); in show_bits()
225 for (msk = 1; valid_bits; msk <<= 1) { in show_bits()
226 if (!(msk & valid_bits)) continue; in show_bits()
227 valid_bits &= ~msk; in show_bits()
Dpvrusb2-hdw-internal.h108 unsigned int valid_bits; /* bits in use */ member
Dpvrusb2-hdw.c851 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail; in ctrl_stdavail_set()
950 .def.type_bitmask.valid_bits = msk, \
1884 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail; in pvr2_hdw_setup_std()
2517 hdw->std_info_avail.def.type_bitmask.valid_bits = in pvr2_hdw_create()
2527 hdw->std_info_cur.def.type_bitmask.valid_bits = in pvr2_hdw_create()
2537 hdw->std_info_detect.def.type_bitmask.valid_bits = in pvr2_hdw_create()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atpx_handler.c178 u32 valid_bits = 0; in amdgpu_atpx_validate() local
201 valid_bits = output.flags & output.valid_flags; in amdgpu_atpx_validate()
207 if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) { in amdgpu_atpx_validate()
212 if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED | in amdgpu_atpx_validate()
219 if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED | in amdgpu_atpx_validate()
224 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { in amdgpu_atpx_validate()
241 if (valid_bits & ATPX_DGPU_REQ_POWER_FOR_DISPLAYS) in amdgpu_atpx_validate()
/drivers/gpu/drm/radeon/
Dradeon_atpx_handler.c159 u32 valid_bits = 0; in radeon_atpx_validate() local
182 valid_bits = output.flags & output.valid_flags; in radeon_atpx_validate()
188 if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) { in radeon_atpx_validate()
193 if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED | in radeon_atpx_validate()
199 if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED | in radeon_atpx_validate()
204 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { in radeon_atpx_validate()
/drivers/pci/controller/
Dpcie-hisi-error.c199 const unsigned long valid_bits[] = {BITMAP_FROM_U64(edata->val_bits)}; in hisi_pcie_handle_error() local
232 for_each_set_bit_from(idx, valid_bits, in hisi_pcie_handle_error()
/drivers/net/ethernet/emulex/benet/
Dbe_cmds.h1705 u32 valid_bits; member
Dbe_cmds.c3495 req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); in be_cmd_set_qos()