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Searched refs:values (Results 1 – 25 of 207) sorted by relevance

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/drivers/iio/test/
Diio-test-format.c47 int values[2]; in iio_test_iio_format_value_fixedpoint() local
55 values[0] = 1; in iio_test_iio_format_value_fixedpoint()
56 values[1] = 10; in iio_test_iio_format_value_fixedpoint()
58 ret = iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, ARRAY_SIZE(values), values); in iio_test_iio_format_value_fixedpoint()
61 ret = iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO_DB, ARRAY_SIZE(values), values); in iio_test_iio_format_value_fixedpoint()
64 ret = iio_format_value(buf, IIO_VAL_INT_PLUS_NANO, ARRAY_SIZE(values), values); in iio_test_iio_format_value_fixedpoint()
68 values[0] = 0; in iio_test_iio_format_value_fixedpoint()
69 values[1] = 12; in iio_test_iio_format_value_fixedpoint()
71 ret = iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, ARRAY_SIZE(values), values); in iio_test_iio_format_value_fixedpoint()
74 ret = iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO_DB, ARRAY_SIZE(values), values); in iio_test_iio_format_value_fixedpoint()
[all …]
Diio-test-rescale.c651 int values[2]; in iio_rescale_test_scale() local
658 values[0] = t->schan_val; in iio_rescale_test_scale()
659 values[1] = t->schan_val2; in iio_rescale_test_scale()
662 &values[0], &values[1]); in iio_rescale_test_scale()
664 ret = iio_format_value(buff, ret, 2, values); in iio_rescale_test_scale()
681 int values[2]; in iio_rescale_test_offset() local
687 values[0] = t->schan_val; in iio_rescale_test_offset()
688 values[1] = t->schan_val2; in iio_rescale_test_offset()
692 &values[0], &values[1]); in iio_rescale_test_offset()
694 ret = iio_format_value(buff_off, ret, 2, values); in iio_rescale_test_offset()
/drivers/pcmcia/
Dmax1600.c70 DECLARE_BITMAP(values, MAX1600_GPIO_MAX) = { 0, }; in max1600_configure()
75 __assign_bit(MAX1600_GPIO_0VPP, values, 0); in max1600_configure()
76 __assign_bit(MAX1600_GPIO_1VPP, values, 0); in max1600_configure()
78 __assign_bit(MAX1600_GPIO_0VPP, values, 0); in max1600_configure()
79 __assign_bit(MAX1600_GPIO_1VPP, values, 1); in max1600_configure()
81 __assign_bit(MAX1600_GPIO_0VPP, values, 1); in max1600_configure()
82 __assign_bit(MAX1600_GPIO_1VPP, values, 0); in max1600_configure()
95 __assign_bit(MAX1600_GPIO_0VCC, values, 0); in max1600_configure()
96 __assign_bit(MAX1600_GPIO_1VCC, values, 0); in max1600_configure()
98 __assign_bit(MAX1600_GPIO_0VCC, values, 1); in max1600_configure()
[all …]
Dsa1111_jornada720.c64 DECLARE_BITMAP(values, J720_GPIO_MAX) = { 0, }; in jornada720_pcmcia_configure_socket()
75 __assign_bit(J720_GPIO_PWR, values, 0); in jornada720_pcmcia_configure_socket()
76 __assign_bit(J720_GPIO_3V, values, 0); in jornada720_pcmcia_configure_socket()
79 __assign_bit(J720_GPIO_PWR, values, 1); in jornada720_pcmcia_configure_socket()
80 __assign_bit(J720_GPIO_3V, values, 1); in jornada720_pcmcia_configure_socket()
83 __assign_bit(J720_GPIO_PWR, values, 1); in jornada720_pcmcia_configure_socket()
84 __assign_bit(J720_GPIO_3V, values, 0); in jornada720_pcmcia_configure_socket()
93 __assign_bit(J720_GPIO_PWR, values, 0); in jornada720_pcmcia_configure_socket()
94 __assign_bit(J720_GPIO_3V, values, 0); in jornada720_pcmcia_configure_socket()
98 __assign_bit(J720_GPIO_PWR, values, 1); in jornada720_pcmcia_configure_socket()
[all …]
/drivers/video/fbdev/matrox/
Dmatroxfb_misc.c544 minfo->values.pll.system = get_unaligned_le16(bd->pins + 28) ? in parse_pins1()
548 minfo->values.reg.mctlwtst = 0x00030101; in parse_pins1()
556 minfo->values.pll.system = 50000; in default_pins1()
558 minfo->values.reg.mctlwtst = 0x00030101; in default_pins1()
566 minfo->values.reg.mctlwtst = ((bd->pins[51] & 0x01) ? 0x00000001 : 0) | in parse_pins2()
570 minfo->values.pll.system = (bd->pins[43] == 0xFF) ? 50000 : ((bd->pins[43] + 100) * 1000); in parse_pins2()
580 minfo->values.reg.mctlwtst = 0x00030101; in default_pins2()
581 minfo->values.pll.system = 50000; in default_pins2()
590 minfo->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ? in parse_pins3()
593 minfo->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) | in parse_pins3()
[all …]
Dmatroxfb_DAC1064.c721 pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3 & ~0x00300C03); in g450_mclk_init()
724 if (((minfo->values.reg.opt3 & 0x000003) == 0x000003) || in g450_mclk_init()
725 ((minfo->values.reg.opt3 & 0x000C00) == 0x000C00) || in g450_mclk_init()
726 ((minfo->values.reg.opt3 & 0x300000) == 0x300000)) { in g450_mclk_init()
727 matroxfb_g450_setclk(minfo, minfo->values.pll.video, M_VIDEO_PLL); in g450_mclk_init()
737 matroxfb_g450_setclk(minfo, minfo->values.pll.system, M_SYSTEM_PLL); in g450_mclk_init()
741 pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3); in g450_mclk_init()
754 minfo->hw.MXoptionReg |= 0x00207E00 & minfo->values.reg.opt; in g450_memory_init()
756 pci_write_config_dword(minfo->pcidev, PCI_OPTION2_REG, minfo->values.reg.opt2); in g450_memory_init()
758 mga_outl(M_CTLWTST, minfo->values.reg.mctlwtst); in g450_memory_init()
[all …]
/drivers/soc/rockchip/
Dgrf.c24 const struct rockchip_grf_value *values; member
39 .values = rk3036_defaults,
50 .values = rk3128_defaults,
61 .values = rk3228_defaults,
74 .values = rk3288_defaults,
85 .values = rk3328_defaults,
96 .values = rk3368_defaults,
107 .values = rk3399_defaults,
120 .values = rk3566_defaults,
182 const struct rockchip_grf_value *val = &grf_info->values[i]; in rockchip_grf_init()
/drivers/i2c/muxes/
Di2c-mux-gpio.c28 DECLARE_BITMAP(values, BITS_PER_TYPE(val)); in i2c_mux_gpio_set()
30 values[0] = val; in i2c_mux_gpio_set()
32 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
62 unsigned *values; in i2c_mux_gpio_probe_fw() local
94 values = devm_kcalloc(dev, in i2c_mux_gpio_probe_fw()
95 mux->data.n_values, sizeof(*mux->data.values), in i2c_mux_gpio_probe_fw()
97 if (!values) { in i2c_mux_gpio_probe_fw()
104 fwnode_property_read_u32(child, "reg", values + i); in i2c_mux_gpio_probe_fw()
107 rc = acpi_get_local_address(ACPI_HANDLE_FWNODE(child), values + i); in i2c_mux_gpio_probe_fw()
116 mux->data.values = values; in i2c_mux_gpio_probe_fw()
[all …]
Di2c-mux-reg.c86 unsigned *values; in i2c_mux_reg_probe_dt() local
123 values = devm_kcalloc(&pdev->dev, in i2c_mux_reg_probe_dt()
124 mux->data.n_values, sizeof(*mux->data.values), in i2c_mux_reg_probe_dt()
126 if (!values) in i2c_mux_reg_probe_dt()
130 of_property_read_u32(child, "reg", values + i); in i2c_mux_reg_probe_dt()
133 mux->data.values = values; in i2c_mux_reg_probe_dt()
218 ret = i2c_mux_add_adapter(muxc, nr, mux->data.values[i], class); in i2c_mux_reg_probe()
/drivers/auxdisplay/
Dhd44780.c66 DECLARE_BITMAP(values, 10); /* for DATA[0-7], RS, RW */ in hd44780_write_gpio8()
69 values[0] = val; in hd44780_write_gpio8()
70 __assign_bit(8, values, rs); in hd44780_write_gpio8()
74 gpiod_set_array_value_cansleep(n, &hd->pins[PIN_DATA0], NULL, values); in hd44780_write_gpio8()
82 DECLARE_BITMAP(values, 6); /* for DATA[4-7], RS, RW */ in hd44780_write_gpio4()
86 values[0] = val >> 4; in hd44780_write_gpio4()
87 __assign_bit(4, values, rs); in hd44780_write_gpio4()
91 gpiod_set_array_value_cansleep(n, &hd->pins[PIN_DATA4], NULL, values); in hd44780_write_gpio4()
96 values[0] &= ~0x0fUL; in hd44780_write_gpio4()
97 values[0] |= val & 0x0f; in hd44780_write_gpio4()
[all …]
/drivers/hwtracing/coresight/
Dcoresight-cti-platform.c245 u32 *values; in cti_plat_read_trig_group() local
250 values = kcalloc(tgrp->nr_sigs, sizeof(u32), GFP_KERNEL); in cti_plat_read_trig_group()
251 if (!values) in cti_plat_read_trig_group()
255 values, tgrp->nr_sigs); in cti_plat_read_trig_group()
260 tgrp->used_mask |= BIT(values[idx]); in cti_plat_read_trig_group()
263 kfree(values); in cti_plat_read_trig_group()
272 u32 *values = NULL, i; in cti_plat_read_trig_types() local
286 values = kcalloc(items, sizeof(u32), GFP_KERNEL); in cti_plat_read_trig_types()
287 if (!values) in cti_plat_read_trig_types()
291 values, items); in cti_plat_read_trig_types()
[all …]
/drivers/mmc/core/
Dpwrseq_simple.c42 unsigned long *values; in mmc_pwrseq_simple_set_gpios_value() local
45 values = bitmap_alloc(nvalues, GFP_KERNEL); in mmc_pwrseq_simple_set_gpios_value()
46 if (!values) in mmc_pwrseq_simple_set_gpios_value()
50 bitmap_fill(values, nvalues); in mmc_pwrseq_simple_set_gpios_value()
52 bitmap_zero(values, nvalues); in mmc_pwrseq_simple_set_gpios_value()
55 reset_gpios->info, values); in mmc_pwrseq_simple_set_gpios_value()
57 bitmap_free(values); in mmc_pwrseq_simple_set_gpios_value()
/drivers/net/bonding/
Dbond_options.c241 .values = bond_mode_tbl,
249 .values = bond_pps_tbl,
256 .values = bond_xmit_hashtype_tbl,
265 .values = bond_arp_validate_tbl,
272 .values = bond_arp_all_targets_tbl,
280 .values = bond_fail_over_mac_tbl,
289 .values = bond_intmax_tbl,
298 .values = bond_missed_max_tbl,
319 .values = bond_intmax_tbl,
326 .values = bond_intmax_tbl,
[all …]
/drivers/gpu/drm/
Ddrm_property.c116 property->values = kcalloc(num_values, sizeof(uint64_t), in drm_property_create()
118 if (!property->values) in drm_property_create()
136 kfree(property->values); in drm_property_create()
251 property->values[0] = min; in property_create_range()
252 property->values[1] = max; in property_create_range()
346 property->values[0] = type; in drm_property_create_object()
426 property->values[index] = value; in drm_property_add_enum()
450 kfree(property->values); in drm_property_destroy()
484 put_user(property->values[i], values_ptr + i)) { in drm_mode_getproperty_ioctl()
885 if (value < property->values[0] || value > property->values[1]) in drm_property_change_valid_get()
[all …]
/drivers/media/platform/renesas/vsp1/
Dvsp1_hgt.c73 const u8 *values = ctrl->p_new.p_u8; in hgt_hue_areas_try_ctrl() local
87 if (values[i] > values[i+1]) in hgt_hue_areas_try_ctrl()
92 if (values[0] > values[1] && values[11] > values[0]) in hgt_hue_areas_try_ctrl()
/drivers/media/usb/dvb-usb/
Daf9005.c46 int readwrite, int type, u8 * values, int len) in af9005_generic_read_write() argument
85 st->data[8 + i] = values[i]; in af9005_generic_read_write()
88 st->data[8] = values[0]; in af9005_generic_read_write()
126 values[i] = st->data[8 + i]; in af9005_generic_read_write()
149 u8 * values, int len) in af9005_read_ofdm_registers() argument
155 values, len); in af9005_read_ofdm_registers()
159 debug_dump(values, len, deb_reg); in af9005_read_ofdm_registers()
179 u8 * values, int len) in af9005_write_ofdm_registers() argument
183 debug_dump(values, len, deb_reg); in af9005_write_ofdm_registers()
187 values, len); in af9005_write_ofdm_registers()
[all …]
/drivers/char/agp/
Dvia-agp.c28 struct aper_size_info_8 *values; in via_fetch_size() local
30 values = A_SIZE_8(agp_bridge->driver->aperture_sizes); in via_fetch_size()
33 if (temp == values[i].size_value) { in via_fetch_size()
35 agp_bridge->current_size = (void *) (values + i); in via_fetch_size()
37 return values[i].size; in via_fetch_size()
110 struct aper_size_info_16 *values; in via_fetch_size_agp3() local
112 values = A_SIZE_16(agp_bridge->driver->aperture_sizes); in via_fetch_size_agp3()
117 if (temp == values[i].size_value) { in via_fetch_size_agp3()
119 agp_bridge->current_size = (void *) (values + i); in via_fetch_size_agp3()
121 return values[i].size; in via_fetch_size_agp3()
/drivers/net/ethernet/mellanox/mlxsw/
Dcore_acl_flex_keys.c380 void mlxsw_afk_values_add_u32(struct mlxsw_afk_element_values *values, in mlxsw_afk_values_add_u32() argument
392 __mlxsw_item_set32(values->storage.key, storage_item, 0, key_value); in mlxsw_afk_values_add_u32()
393 __mlxsw_item_set32(values->storage.mask, storage_item, 0, mask_value); in mlxsw_afk_values_add_u32()
394 mlxsw_afk_element_usage_add(&values->elusage, element); in mlxsw_afk_values_add_u32()
398 void mlxsw_afk_values_add_buf(struct mlxsw_afk_element_values *values, in mlxsw_afk_values_add_buf() argument
412 __mlxsw_item_memcpy_to(values->storage.key, key_value, in mlxsw_afk_values_add_buf()
414 __mlxsw_item_memcpy_to(values->storage.mask, mask_value, in mlxsw_afk_values_add_buf()
416 mlxsw_afk_element_usage_add(&values->elusage, element); in mlxsw_afk_values_add_buf()
463 struct mlxsw_afk_element_values *values, in mlxsw_afk_encode() argument
478 mlxsw_afk_element_usage_for_each(element, &values->elusage) { in mlxsw_afk_encode()
[all …]
/drivers/i2c/
Di2c-core-smbus.c225 u8 *values) in i2c_smbus_read_block_data() argument
236 memcpy(values, &data.block[1], data.block[0]); in i2c_smbus_read_block_data()
252 u8 length, const u8 *values) in i2c_smbus_write_block_data() argument
259 memcpy(&data.block[1], values, length); in i2c_smbus_write_block_data()
268 u8 length, u8 *values) in i2c_smbus_read_i2c_block_data() argument
282 memcpy(values, &data.block[1], data.block[0]); in i2c_smbus_read_i2c_block_data()
288 u8 length, const u8 *values) in i2c_smbus_write_i2c_block_data() argument
295 memcpy(data.block + 1, values, length); in i2c_smbus_write_i2c_block_data()
641 u8 command, u8 length, u8 *values) in i2c_smbus_read_i2c_block_data_or_emulated() argument
650 return i2c_smbus_read_i2c_block_data(client, command, length, values); in i2c_smbus_read_i2c_block_data_or_emulated()
[all …]
/drivers/net/wireless/zydas/zd1211rw/
Dzd_chip.c92 int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr, in zd_ioread32v_locked() argument
125 values[i] = (v16[j] << 16) | v16[j+1]; in zd_ioread32v_locked()
296 u32 *values, unsigned int count) in zd_ioread32v() argument
301 r = zd_ioread32v_locked(chip, values, addresses, count); in zd_ioread32v()
428 static int read_values(struct zd_chip *chip, u8 *values, size_t count, in read_values() argument
443 values[i++] = v; in read_values()
444 values[i++] = v >> 8; in read_values()
445 values[i++] = v >> 16; in read_values()
446 values[i++] = v >> 24; in read_values()
450 values[i] = v >> (8*(i%3)); in read_values()
[all …]
/drivers/input/touchscreen/
Dcyttsp_i2c_common.c27 u16 addr, u8 length, void *values) in cyttsp_i2c_read_block_data() argument
43 .buf = values, in cyttsp_i2c_read_block_data()
57 u16 addr, u8 length, const void *values) in cyttsp_i2c_write_block_data() argument
73 memcpy(&xfer_buf[1], values, length); in cyttsp_i2c_write_block_data()
/drivers/gpu/drm/tegra/
Ddp.c334 u8 values[2], value; in drm_dp_link_configure() local
345 values[0] = drm_dp_link_rate_to_bw_code(link->rate); in drm_dp_link_configure()
346 values[1] = link->lanes; in drm_dp_link_configure()
349 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; in drm_dp_link_configure()
351 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); in drm_dp_link_configure()
471 u8 values[4], pattern = 0; in drm_dp_link_apply_training() local
486 values[i] = DP_TRAIN_VOLTAGE_SWING_LEVEL(vs[i]) | in drm_dp_link_apply_training()
489 err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, lanes); in drm_dp_link_apply_training()
497 values[0] = values[1] = 0; in drm_dp_link_apply_training()
500 values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]); in drm_dp_link_apply_training()
[all …]
/drivers/mtd/nand/raw/
Dnand_hynix.c29 u8 values[]; member
55 const u8 *values; member
111 const u8 *values; in hynix_nand_setup_read_retry() local
114 values = hynix->read_retry->values + in hynix_nand_setup_read_retry()
133 values[i]); in hynix_nand_setup_read_retry()
207 info->values[i]); in hynix_read_rr_otp()
323 u8 *val = rr->values + (i * nregs); in hynix_mlc_1xnm_rr_init()
359 .values = hynix_mlc_1xnm_rr_otp_values,
366 .values = hynix_mlc_1xnm_rr_otp_values,
/drivers/iio/imu/inv_icm42600/
Dinv_icm42600_timestamp.c29 acc->values[acc->idx++] = val; in inv_update_acc()
30 if (acc->idx >= ARRAY_SIZE(acc->values)) in inv_update_acc()
34 for (i = 0; i < ARRAY_SIZE(acc->values); ++i) { in inv_update_acc()
35 if (acc->values[i] == 0) in inv_update_acc()
37 sum += acc->values[i]; in inv_update_acc()
/drivers/mfd/
Dstmpe-i2c.c34 static int i2c_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) in i2c_block_read() argument
38 return i2c_smbus_read_i2c_block_data(i2c, reg, length, values); in i2c_block_read()
42 const u8 *values) in i2c_block_write() argument
46 return i2c_smbus_write_i2c_block_data(i2c, reg, length, values); in i2c_block_write()

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