| /drivers/regulator/ |
| D | qcom-labibb-regulator.c | 110 struct labibb_regulator *vreg = rdev_get_drvdata(rdev); in qcom_labibb_ocp_hw_enable() local
115 vreg->base + REG_LABIBB_INT_LATCHED_CLR, in qcom_labibb_ocp_hw_enable()
122 vreg->base + REG_LABIBB_INT_EN_SET, in qcom_labibb_ocp_hw_enable()
128 struct labibb_regulator *vreg = rdev_get_drvdata(rdev); in qcom_labibb_ocp_hw_disable() local
131 vreg->base + REG_LABIBB_INT_EN_CLR, in qcom_labibb_ocp_hw_disable()
145 static int qcom_labibb_check_ocp_status(struct labibb_regulator *vreg) in qcom_labibb_check_ocp_status() argument
150 ret = regmap_read(vreg->rdev->regmap, vreg->base + REG_LABIBB_STATUS1, in qcom_labibb_check_ocp_status()
181 struct labibb_regulator *vreg; in qcom_labibb_ocp_recovery_worker() local
185 vreg = container_of(work, struct labibb_regulator, in qcom_labibb_ocp_recovery_worker()
187 ops = vreg->rdev->desc->ops; in qcom_labibb_ocp_recovery_worker()
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| D | qcom_spmi-regulator.c | 624 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, in spmi_vreg_read() argument
627 return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); in spmi_vreg_read()
630 static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr, in spmi_vreg_write() argument
633 return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); in spmi_vreg_write()
636 static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val, in spmi_vreg_update_bits() argument
639 return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val); in spmi_vreg_update_bits()
644 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); in spmi_regulator_vs_enable() local
646 if (vreg->ocp_irq) { in spmi_regulator_vs_enable()
647 vreg->ocp_count = 0; in spmi_regulator_vs_enable()
648 vreg->vs_enable_time = ktime_get(); in spmi_regulator_vs_enable()
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| D | qcom_rpm-regulator.c | 189 static int rpm_reg_write(struct qcom_rpm_reg *vreg, in rpm_reg_write() argument
196 vreg->val[req->word] &= ~req->mask; in rpm_reg_write()
197 vreg->val[req->word] |= value << req->shift; in rpm_reg_write()
199 return qcom_rpm_write(vreg->rpm, in rpm_reg_write()
201 vreg->resource, in rpm_reg_write()
202 vreg->val, in rpm_reg_write()
203 vreg->parts->request_len); in rpm_reg_write()
209 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); in rpm_reg_set_mV_sel() local
210 const struct rpm_reg_parts *parts = vreg->parts; in rpm_reg_set_mV_sel()
222 mutex_lock(&vreg->lock); in rpm_reg_set_mV_sel()
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| D | qcom-rpmh-regulator.c | 161 static int rpmh_regulator_send_request(struct rpmh_vreg *vreg, in rpmh_regulator_send_request() argument
166 if (wait_for_ack || vreg->always_wait_for_ack) in rpmh_regulator_send_request()
167 ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1); in rpmh_regulator_send_request()
169 ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, in rpmh_regulator_send_request()
178 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); in _rpmh_regulator_vrm_set_voltage_sel() local
180 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE, in _rpmh_regulator_vrm_set_voltage_sel()
188 ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack); in _rpmh_regulator_vrm_set_voltage_sel()
190 vreg->voltage_selector = selector; in _rpmh_regulator_vrm_set_voltage_sel()
198 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); in rpmh_regulator_vrm_set_voltage_sel() local
200 if (vreg->enabled == -EINVAL) { in rpmh_regulator_vrm_set_voltage_sel()
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| D | mt6358-regulator.c | 37 #define MT6358_BUCK(match, vreg, min, max, step, \ argument
40 [MT6358_ID_##vreg] = { \
42 .name = #vreg, \
46 .id = MT6358_ID_##vreg, \
51 .vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
53 .enable_reg = MT6358_BUCK_##vreg##_CON0, \
57 .status_reg = MT6358_BUCK_##vreg##_DBG1, \
65 #define MT6358_LDO(match, vreg, ldo_volt_table, \ argument
68 [MT6358_ID_##vreg] = { \
70 .name = #vreg, \
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| D | pcap-regulator.c | 144 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_set_voltage_sel() local
151 return ezx_pcap_set_bits(pcap, vreg->reg, in pcap_regulator_set_voltage_sel()
152 (rdev->desc->n_voltages - 1) << vreg->index, in pcap_regulator_set_voltage_sel()
153 selector << vreg->index); in pcap_regulator_set_voltage_sel()
158 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_get_voltage_sel() local
165 ezx_pcap_read(pcap, vreg->reg, &tmp); in pcap_regulator_get_voltage_sel()
166 tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1)); in pcap_regulator_get_voltage_sel()
172 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)]; in pcap_regulator_enable() local
175 if (vreg->en == NA) in pcap_regulator_enable()
178 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en); in pcap_regulator_enable()
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| D | qcom_smd-regulator.c | 44 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg) in rpm_reg_write_active() argument
50 if (vreg->enabled_updated) { in rpm_reg_write_active()
53 req[reqlen].value = cpu_to_le32(vreg->is_enabled); in rpm_reg_write_active()
57 if (vreg->uv_updated && vreg->is_enabled) { in rpm_reg_write_active()
60 req[reqlen].value = cpu_to_le32(vreg->uV); in rpm_reg_write_active()
64 if (vreg->load_updated && vreg->is_enabled) { in rpm_reg_write_active()
67 req[reqlen].value = cpu_to_le32(vreg->load / 1000); in rpm_reg_write_active()
74 ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE, in rpm_reg_write_active()
75 vreg->type, vreg->id, in rpm_reg_write_active()
78 vreg->enabled_updated = 0; in rpm_reg_write_active()
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| D | mt6332-regulator.c | 47 #define MT6332_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
49 [MT6332_ID_##vreg] = { \
51 .name = #vreg, \
55 .id = MT6332_ID_##vreg, \
72 #define MT6332_LDO_LINEAR(match, vreg, min, max, step, volt_ranges, \ argument
75 [MT6332_ID_##vreg] = { \
77 .name = #vreg, \
81 .id = MT6332_ID_##vreg, \
100 #define MT6332_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \ argument
101 [MT6332_ID_##vreg] = { \
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| D | mt6331-regulator.c | 47 #define MT6331_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
49 [MT6331_ID_##vreg] = { \
51 .name = #vreg, \
55 .id = MT6331_ID_##vreg, \
72 #define MT6331_LDO_AO(match, vreg, ldo_volt_table, vosel, vosel_mask) \ argument
73 [MT6331_ID_##vreg] = { \
75 .name = #vreg, \
79 .id = MT6331_ID_##vreg, \
88 #define MT6331_LDO_S(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ argument
91 [MT6331_ID_##vreg] = { \
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| D | 88pm8607.c | 247 #define PM8607_DVC(vreg, ureg, ubit, ereg, ebit) \ argument
250 .name = #vreg, \
251 .of_match = of_match_ptr(#vreg), \
255 .id = PM8607_ID_##vreg, \
257 .volt_table = vreg##_table, \
258 .n_voltages = ARRAY_SIZE(vreg##_table), \
259 .vsel_reg = PM8607_##vreg, \
260 .vsel_mask = ARRAY_SIZE(vreg##_table) - 1, \
267 .vol_suspend = (unsigned int *)&vreg##_suspend_table, \
270 #define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ argument
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| D | mt6380-regulator.c | 91 #define MT6380_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
94 [MT6380_ID_##vreg] = { \
96 .name = #vreg, \
100 .id = MT6380_ID_##vreg, \
115 #define MT6380_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ argument
117 [MT6380_ID_##vreg] = { \
119 .name = #vreg, \
123 .id = MT6380_ID_##vreg, \
136 #define MT6380_REG_FIXED(match, vreg, enreg, enbit, volt, \ argument
138 [MT6380_ID_##vreg] = { \
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| D | mt6397-regulator.c | 37 #define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
40 [MT6397_ID_##vreg] = { \
42 .name = #vreg, \
46 .id = MT6397_ID_##vreg, \
65 #define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ argument
67 [MT6397_ID_##vreg] = { \
69 .name = #vreg, \
73 .id = MT6397_ID_##vreg, \
85 #define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \ argument
86 [MT6397_ID_##vreg] = { \
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| D | mt6323-regulator.c | 39 #define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \ argument
41 [MT6323_ID_##vreg] = { \
43 .name = #vreg, \
47 .id = MT6323_ID_##vreg, \
63 #define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \ argument
65 [MT6323_ID_##vreg] = { \
67 .name = #vreg, \
71 .id = MT6323_ID_##vreg, \
85 #define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt, \ argument
87 [MT6323_ID_##vreg] = { \
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| D | da903x-regulator.c | 309 #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
322 .vol_reg = _pmic##_##vreg, \
329 #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
342 .vol_reg = _pmic##_##vreg, \
351 #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
352 DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
354 #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
355 DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
357 #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
358 DA903x_DVC(DA9030, _id, min, max, step, vreg, nbits, ureg, ubit, \
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| D | 88pm800-regulator.c | 86 #define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \ argument
89 .name = #vreg, \
94 .id = PM800_ID_##vreg, \
99 .vsel_reg = PM800_##vreg, \
116 #define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \ argument
119 .name = #vreg, \
124 .id = PM800_ID_##vreg, \
127 .vsel_reg = PM800_##vreg##_VOUT, \
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| D | tps6586x-regulator.c | 109 #define TPS6586X_REGULATOR(_id, _ops, _pin_name, vdata, vreg, shift, nbits, \ argument
122 .vsel_reg = TPS6586X_##vreg, \
133 uv_step, vreg, shift, nbits, ereg0, \ argument
147 .vsel_reg = TPS6586X_##vreg, \
157 #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
160 TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \
164 #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ argument
168 min_uv, uv_step, vreg, shift, nbits, \
172 #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
175 TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \
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| D | hi6421-regulator.c | 129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
142 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
168 #define HI6421_LDO_LINEAR(_id, _match, _min_uV, n_volt, vstep, vreg, vmask,\ argument
182 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
208 #define HI6421_LDO_LINEAR_RANGE(_id, _match, n_volt, volt_ranges, vreg, vmask,\ argument
222 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
245 #define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ argument
259 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
282 #define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
295 .vsel_reg = HI6421_REG_TO_BUS_ADDR(vreg), \
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| D | hi655x-regulator.c | 107 #define HI655X_LDO(_ID, vreg, vmask, ereg, dreg, \ argument
119 .vsel_reg = HI655X_BUS_ADDR(vreg), \
128 #define HI655X_LDO_LINEAR(_ID, vreg, vmask, ereg, dreg, \ argument
141 .vsel_reg = HI655X_BUS_ADDR(vreg), \
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| /drivers/gpu/drm/panel/ |
| D | panel-boe-bf060y8m-aj0.c | 299 struct regulator *vreg; in boe_bf060y8m_aj0_init_vregs() local
314 vreg = boe->vregs[BF060Y8M_VREG_VCC].consumer; in boe_bf060y8m_aj0_init_vregs()
315 ret = regulator_is_supported_voltage(vreg, 2700000, 3600000); in boe_bf060y8m_aj0_init_vregs()
319 vreg = boe->vregs[BF060Y8M_VREG_VDDIO].consumer; in boe_bf060y8m_aj0_init_vregs()
320 ret = regulator_is_supported_voltage(vreg, 1620000, 1980000); in boe_bf060y8m_aj0_init_vregs()
324 vreg = boe->vregs[BF060Y8M_VREG_VCI].consumer; in boe_bf060y8m_aj0_init_vregs()
325 ret = regulator_is_supported_voltage(vreg, 2600000, 3600000); in boe_bf060y8m_aj0_init_vregs()
329 vreg = boe->vregs[BF060Y8M_VREG_EL_VDD].consumer; in boe_bf060y8m_aj0_init_vregs()
330 ret = regulator_is_supported_voltage(vreg, 4400000, 4800000); in boe_bf060y8m_aj0_init_vregs()
335 vreg = boe->vregs[BF060Y8M_VREG_EL_VSS].consumer; in boe_bf060y8m_aj0_init_vregs()
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| /drivers/hwmon/pmbus/ |
| D | zl6100.c | 140 int ret, vreg; in zl6100_read_word_data() local
160 vreg = MFR_READ_VMON; in zl6100_read_word_data()
164 vreg = MFR_VMON_OV_FAULT_LIMIT; in zl6100_read_word_data()
168 vreg = MFR_VMON_UV_FAULT_LIMIT; in zl6100_read_word_data()
173 vreg = reg; in zl6100_read_word_data()
178 ret = pmbus_read_word_data(client, page, phase, vreg); in zl6100_read_word_data()
238 int ret, vreg; in zl6100_write_word_data() local
246 vreg = MFR_VMON_OV_FAULT_LIMIT; in zl6100_write_word_data()
250 vreg = MFR_VMON_OV_FAULT_LIMIT; in zl6100_write_word_data()
255 vreg = MFR_VMON_UV_FAULT_LIMIT; in zl6100_write_word_data()
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| /drivers/gpu/drm/i915/gvt/ |
| D | debugfs.c | 39 u32 vreg; member
63 u32 preg, vreg; in mmio_diff_handler() local
66 vreg = vgpu_vreg(param->vgpu, offset); in mmio_diff_handler()
68 if (preg != vreg) { in mmio_diff_handler()
75 node->vreg = vreg; in mmio_diff_handler()
113 u32 diff = node->preg ^ node->vreg; in vgpu_mmio_diff_show()
116 node->offset, node->preg, node->vreg, in vgpu_mmio_diff_show()
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| D | mmio.c | 250 memcpy(vgpu->mmio.vreg, mmio, info->mmio_size); in intel_vgpu_reset_mmio()
298 memcpy(vgpu->mmio.vreg, mmio, GVT_GEN8_MMIO_RESET_OFFSET); in intel_vgpu_reset_mmio()
314 vgpu->mmio.vreg = vzalloc(info->mmio_size); in intel_vgpu_init_mmio()
315 if (!vgpu->mmio.vreg) in intel_vgpu_init_mmio()
330 vfree(vgpu->mmio.vreg); in intel_vgpu_clean_mmio()
331 vgpu->mmio.vreg = NULL; in intel_vgpu_clean_mmio()
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| D | gvt.h | 94 void *vreg; member
462 (*(u32 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
464 (*(u32 *)(vgpu->mmio.vreg + (offset)))
466 (*(u64 *)(vgpu->mmio.vreg + i915_mmio_reg_offset(reg)))
468 (*(u64 *)(vgpu->mmio.vreg + (offset)))
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| /drivers/ufs/host/ |
| D | ufshcd-pltfrm.c | 127 struct ufs_vreg *vreg = NULL; in ufshcd_populate_vreg() local
142 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); in ufshcd_populate_vreg()
143 if (!vreg) in ufshcd_populate_vreg()
146 vreg->name = devm_kstrdup(dev, name, GFP_KERNEL); in ufshcd_populate_vreg()
147 if (!vreg->name) in ufshcd_populate_vreg()
151 if (of_property_read_u32(np, prop_name, &vreg->max_uA)) { in ufshcd_populate_vreg()
153 vreg->max_uA = 0; in ufshcd_populate_vreg()
156 *out_vreg = vreg; in ufshcd_populate_vreg()
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| D | ufs-sprd.c | 86 vregi->vreg = devm_regulator_get(dev, vregi->name); in ufs_sprd_get_vreg()
87 if (IS_ERR(vregi->vreg)) { in ufs_sprd_get_vreg()
89 return PTR_ERR(vregi->vreg); in ufs_sprd_get_vreg()
262 ret = regulator_enable(priv->vregi[SPRD_UFS_VDD_MPHY].vreg); in ufs_sprd_n6_init()
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