1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Xen event channels
4 *
5 * Xen models interrupts with abstract event channels. Because each
6 * domain gets 1024 event channels, but NR_IRQ is not that large, we
7 * must dynamically map irqs<->event channels. The event channels
8 * interface with the rest of the kernel by defining a xen interrupt
9 * chip. When an event is received, it is mapped to an irq and sent
10 * through the normal interrupt processing path.
11 *
12 * There are four kinds of events which can be mapped to an event
13 * channel:
14 *
15 * 1. Inter-domain notifications. This includes all the virtual
16 * device events, since they're driven by front-ends in another domain
17 * (typically dom0).
18 * 2. VIRQs, typically used for timers. These are per-cpu events.
19 * 3. IPIs.
20 * 4. PIRQs - Hardware interrupts.
21 *
22 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
23 */
24
25 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
26
27 #include <linux/linkage.h>
28 #include <linux/interrupt.h>
29 #include <linux/irq.h>
30 #include <linux/moduleparam.h>
31 #include <linux/string.h>
32 #include <linux/memblock.h>
33 #include <linux/slab.h>
34 #include <linux/irqnr.h>
35 #include <linux/pci.h>
36 #include <linux/rcupdate.h>
37 #include <linux/spinlock.h>
38 #include <linux/cpuhotplug.h>
39 #include <linux/atomic.h>
40 #include <linux/ktime.h>
41
42 #ifdef CONFIG_X86
43 #include <asm/desc.h>
44 #include <asm/ptrace.h>
45 #include <asm/idtentry.h>
46 #include <asm/irq.h>
47 #include <asm/io_apic.h>
48 #include <asm/i8259.h>
49 #include <asm/xen/cpuid.h>
50 #include <asm/xen/pci.h>
51 #endif
52 #include <asm/sync_bitops.h>
53 #include <asm/xen/hypercall.h>
54 #include <asm/xen/hypervisor.h>
55 #include <xen/page.h>
56
57 #include <xen/xen.h>
58 #include <xen/hvm.h>
59 #include <xen/xen-ops.h>
60 #include <xen/events.h>
61 #include <xen/interface/xen.h>
62 #include <xen/interface/event_channel.h>
63 #include <xen/interface/hvm/hvm_op.h>
64 #include <xen/interface/hvm/params.h>
65 #include <xen/interface/physdev.h>
66 #include <xen/interface/sched.h>
67 #include <xen/interface/vcpu.h>
68 #include <xen/xenbus.h>
69 #include <asm/hw_irq.h>
70
71 #include "events_internal.h"
72
73 #undef MODULE_PARAM_PREFIX
74 #define MODULE_PARAM_PREFIX "xen."
75
76 /* Interrupt types. */
77 enum xen_irq_type {
78 IRQT_UNBOUND = 0,
79 IRQT_PIRQ,
80 IRQT_VIRQ,
81 IRQT_IPI,
82 IRQT_EVTCHN
83 };
84
85 /*
86 * Packed IRQ information:
87 * type - enum xen_irq_type
88 * event channel - irq->event channel mapping
89 * cpu - cpu this event channel is bound to
90 * index - type-specific information:
91 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
92 * guest, or GSI (real passthrough IRQ) of the device.
93 * VIRQ - virq number
94 * IPI - IPI vector
95 * EVTCHN -
96 */
97 struct irq_info {
98 struct list_head list;
99 struct list_head eoi_list;
100 struct rcu_work rwork;
101 short refcnt;
102 u8 spurious_cnt;
103 u8 is_accounted;
104 short type; /* type: IRQT_* */
105 u8 mask_reason; /* Why is event channel masked */
106 #define EVT_MASK_REASON_EXPLICIT 0x01
107 #define EVT_MASK_REASON_TEMPORARY 0x02
108 #define EVT_MASK_REASON_EOI_PENDING 0x04
109 u8 is_active; /* Is event just being handled? */
110 unsigned irq;
111 evtchn_port_t evtchn; /* event channel */
112 unsigned short cpu; /* cpu bound */
113 unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */
114 unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */
115 u64 eoi_time; /* Time in jiffies when to EOI. */
116 raw_spinlock_t lock;
117
118 union {
119 unsigned short virq;
120 enum ipi_vector ipi;
121 struct {
122 unsigned short pirq;
123 unsigned short gsi;
124 unsigned char vector;
125 unsigned char flags;
126 uint16_t domid;
127 } pirq;
128 struct xenbus_device *interdomain;
129 } u;
130 };
131
132 #define PIRQ_NEEDS_EOI (1 << 0)
133 #define PIRQ_SHAREABLE (1 << 1)
134 #define PIRQ_MSI_GROUP (1 << 2)
135
136 static uint __read_mostly event_loop_timeout = 2;
137 module_param(event_loop_timeout, uint, 0644);
138
139 static uint __read_mostly event_eoi_delay = 10;
140 module_param(event_eoi_delay, uint, 0644);
141
142 const struct evtchn_ops *evtchn_ops;
143
144 /*
145 * This lock protects updates to the following mapping and reference-count
146 * arrays. The lock does not need to be acquired to read the mapping tables.
147 */
148 static DEFINE_MUTEX(irq_mapping_update_lock);
149
150 /*
151 * Lock hierarchy:
152 *
153 * irq_mapping_update_lock
154 * IRQ-desc lock
155 * percpu eoi_list_lock
156 * irq_info->lock
157 */
158
159 static LIST_HEAD(xen_irq_list_head);
160
161 /* IRQ <-> VIRQ mapping. */
162 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
163
164 /* IRQ <-> IPI mapping */
165 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
166
167 /* Event channel distribution data */
168 static atomic_t channels_on_cpu[NR_CPUS];
169
170 static int **evtchn_to_irq;
171 #ifdef CONFIG_X86
172 static unsigned long *pirq_eoi_map;
173 #endif
174 static bool (*pirq_needs_eoi)(unsigned irq);
175
176 #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
177 #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
178 #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
179
180 /* Xen will never allocate port zero for any purpose. */
181 #define VALID_EVTCHN(chn) ((chn) != 0)
182
183 static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY];
184
185 static struct irq_chip xen_dynamic_chip;
186 static struct irq_chip xen_lateeoi_chip;
187 static struct irq_chip xen_percpu_chip;
188 static struct irq_chip xen_pirq_chip;
189 static void enable_dynirq(struct irq_data *data);
190 static void disable_dynirq(struct irq_data *data);
191
192 static DEFINE_PER_CPU(unsigned int, irq_epoch);
193
clear_evtchn_to_irq_row(int * evtchn_row)194 static void clear_evtchn_to_irq_row(int *evtchn_row)
195 {
196 unsigned col;
197
198 for (col = 0; col < EVTCHN_PER_ROW; col++)
199 WRITE_ONCE(evtchn_row[col], -1);
200 }
201
clear_evtchn_to_irq_all(void)202 static void clear_evtchn_to_irq_all(void)
203 {
204 unsigned row;
205
206 for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
207 if (evtchn_to_irq[row] == NULL)
208 continue;
209 clear_evtchn_to_irq_row(evtchn_to_irq[row]);
210 }
211 }
212
set_evtchn_to_irq(evtchn_port_t evtchn,unsigned int irq)213 static int set_evtchn_to_irq(evtchn_port_t evtchn, unsigned int irq)
214 {
215 unsigned row;
216 unsigned col;
217 int *evtchn_row;
218
219 if (evtchn >= xen_evtchn_max_channels())
220 return -EINVAL;
221
222 row = EVTCHN_ROW(evtchn);
223 col = EVTCHN_COL(evtchn);
224
225 if (evtchn_to_irq[row] == NULL) {
226 /* Unallocated irq entries return -1 anyway */
227 if (irq == -1)
228 return 0;
229
230 evtchn_row = (int *) __get_free_pages(GFP_KERNEL, 0);
231 if (evtchn_row == NULL)
232 return -ENOMEM;
233
234 clear_evtchn_to_irq_row(evtchn_row);
235
236 /*
237 * We've prepared an empty row for the mapping. If a different
238 * thread was faster inserting it, we can drop ours.
239 */
240 if (cmpxchg(&evtchn_to_irq[row], NULL, evtchn_row) != NULL)
241 free_page((unsigned long) evtchn_row);
242 }
243
244 WRITE_ONCE(evtchn_to_irq[row][col], irq);
245 return 0;
246 }
247
get_evtchn_to_irq(evtchn_port_t evtchn)248 int get_evtchn_to_irq(evtchn_port_t evtchn)
249 {
250 if (evtchn >= xen_evtchn_max_channels())
251 return -1;
252 if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
253 return -1;
254 return READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]);
255 }
256
257 /* Get info for IRQ */
info_for_irq(unsigned irq)258 static struct irq_info *info_for_irq(unsigned irq)
259 {
260 if (irq < nr_legacy_irqs())
261 return legacy_info_ptrs[irq];
262 else
263 return irq_get_chip_data(irq);
264 }
265
set_info_for_irq(unsigned int irq,struct irq_info * info)266 static void set_info_for_irq(unsigned int irq, struct irq_info *info)
267 {
268 if (irq < nr_legacy_irqs())
269 legacy_info_ptrs[irq] = info;
270 else
271 irq_set_chip_data(irq, info);
272 }
273
274 /* Per CPU channel accounting */
channels_on_cpu_dec(struct irq_info * info)275 static void channels_on_cpu_dec(struct irq_info *info)
276 {
277 if (!info->is_accounted)
278 return;
279
280 info->is_accounted = 0;
281
282 if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
283 return;
284
285 WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], -1 , 0));
286 }
287
channels_on_cpu_inc(struct irq_info * info)288 static void channels_on_cpu_inc(struct irq_info *info)
289 {
290 if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
291 return;
292
293 if (WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], 1,
294 INT_MAX)))
295 return;
296
297 info->is_accounted = 1;
298 }
299
delayed_free_irq(struct work_struct * work)300 static void delayed_free_irq(struct work_struct *work)
301 {
302 struct irq_info *info = container_of(to_rcu_work(work), struct irq_info,
303 rwork);
304 unsigned int irq = info->irq;
305
306 /* Remove the info pointer only now, with no potential users left. */
307 set_info_for_irq(irq, NULL);
308
309 kfree(info);
310
311 /* Legacy IRQ descriptors are managed by the arch. */
312 if (irq >= nr_legacy_irqs())
313 irq_free_desc(irq);
314 }
315
316 /* Constructors for packed IRQ information. */
xen_irq_info_common_setup(struct irq_info * info,unsigned irq,enum xen_irq_type type,evtchn_port_t evtchn,unsigned short cpu)317 static int xen_irq_info_common_setup(struct irq_info *info,
318 unsigned irq,
319 enum xen_irq_type type,
320 evtchn_port_t evtchn,
321 unsigned short cpu)
322 {
323 int ret;
324
325 BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
326
327 info->type = type;
328 info->irq = irq;
329 info->evtchn = evtchn;
330 info->cpu = cpu;
331 info->mask_reason = EVT_MASK_REASON_EXPLICIT;
332 raw_spin_lock_init(&info->lock);
333
334 ret = set_evtchn_to_irq(evtchn, irq);
335 if (ret < 0)
336 return ret;
337
338 irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
339
340 return xen_evtchn_port_setup(evtchn);
341 }
342
xen_irq_info_evtchn_setup(unsigned irq,evtchn_port_t evtchn,struct xenbus_device * dev)343 static int xen_irq_info_evtchn_setup(unsigned irq,
344 evtchn_port_t evtchn,
345 struct xenbus_device *dev)
346 {
347 struct irq_info *info = info_for_irq(irq);
348 int ret;
349
350 ret = xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0);
351 info->u.interdomain = dev;
352 if (dev)
353 atomic_inc(&dev->event_channels);
354
355 return ret;
356 }
357
xen_irq_info_ipi_setup(unsigned cpu,unsigned irq,evtchn_port_t evtchn,enum ipi_vector ipi)358 static int xen_irq_info_ipi_setup(unsigned cpu,
359 unsigned irq,
360 evtchn_port_t evtchn,
361 enum ipi_vector ipi)
362 {
363 struct irq_info *info = info_for_irq(irq);
364
365 info->u.ipi = ipi;
366
367 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
368
369 return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0);
370 }
371
xen_irq_info_virq_setup(unsigned cpu,unsigned irq,evtchn_port_t evtchn,unsigned virq)372 static int xen_irq_info_virq_setup(unsigned cpu,
373 unsigned irq,
374 evtchn_port_t evtchn,
375 unsigned virq)
376 {
377 struct irq_info *info = info_for_irq(irq);
378
379 info->u.virq = virq;
380
381 per_cpu(virq_to_irq, cpu)[virq] = irq;
382
383 return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0);
384 }
385
xen_irq_info_pirq_setup(unsigned irq,evtchn_port_t evtchn,unsigned pirq,unsigned gsi,uint16_t domid,unsigned char flags)386 static int xen_irq_info_pirq_setup(unsigned irq,
387 evtchn_port_t evtchn,
388 unsigned pirq,
389 unsigned gsi,
390 uint16_t domid,
391 unsigned char flags)
392 {
393 struct irq_info *info = info_for_irq(irq);
394
395 info->u.pirq.pirq = pirq;
396 info->u.pirq.gsi = gsi;
397 info->u.pirq.domid = domid;
398 info->u.pirq.flags = flags;
399
400 return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0);
401 }
402
xen_irq_info_cleanup(struct irq_info * info)403 static void xen_irq_info_cleanup(struct irq_info *info)
404 {
405 set_evtchn_to_irq(info->evtchn, -1);
406 xen_evtchn_port_remove(info->evtchn, info->cpu);
407 info->evtchn = 0;
408 channels_on_cpu_dec(info);
409 }
410
411 /*
412 * Accessors for packed IRQ information.
413 */
evtchn_from_irq(unsigned irq)414 evtchn_port_t evtchn_from_irq(unsigned irq)
415 {
416 const struct irq_info *info = NULL;
417
418 if (likely(irq < nr_irqs))
419 info = info_for_irq(irq);
420 if (!info)
421 return 0;
422
423 return info->evtchn;
424 }
425
irq_from_evtchn(evtchn_port_t evtchn)426 unsigned int irq_from_evtchn(evtchn_port_t evtchn)
427 {
428 return get_evtchn_to_irq(evtchn);
429 }
430 EXPORT_SYMBOL_GPL(irq_from_evtchn);
431
irq_from_virq(unsigned int cpu,unsigned int virq)432 int irq_from_virq(unsigned int cpu, unsigned int virq)
433 {
434 return per_cpu(virq_to_irq, cpu)[virq];
435 }
436
ipi_from_irq(unsigned irq)437 static enum ipi_vector ipi_from_irq(unsigned irq)
438 {
439 struct irq_info *info = info_for_irq(irq);
440
441 BUG_ON(info == NULL);
442 BUG_ON(info->type != IRQT_IPI);
443
444 return info->u.ipi;
445 }
446
virq_from_irq(unsigned irq)447 static unsigned virq_from_irq(unsigned irq)
448 {
449 struct irq_info *info = info_for_irq(irq);
450
451 BUG_ON(info == NULL);
452 BUG_ON(info->type != IRQT_VIRQ);
453
454 return info->u.virq;
455 }
456
pirq_from_irq(unsigned irq)457 static unsigned pirq_from_irq(unsigned irq)
458 {
459 struct irq_info *info = info_for_irq(irq);
460
461 BUG_ON(info == NULL);
462 BUG_ON(info->type != IRQT_PIRQ);
463
464 return info->u.pirq.pirq;
465 }
466
type_from_irq(unsigned irq)467 static enum xen_irq_type type_from_irq(unsigned irq)
468 {
469 return info_for_irq(irq)->type;
470 }
471
cpu_from_irq(unsigned irq)472 static unsigned cpu_from_irq(unsigned irq)
473 {
474 return info_for_irq(irq)->cpu;
475 }
476
cpu_from_evtchn(evtchn_port_t evtchn)477 unsigned int cpu_from_evtchn(evtchn_port_t evtchn)
478 {
479 int irq = get_evtchn_to_irq(evtchn);
480 unsigned ret = 0;
481
482 if (irq != -1)
483 ret = cpu_from_irq(irq);
484
485 return ret;
486 }
487
do_mask(struct irq_info * info,u8 reason)488 static void do_mask(struct irq_info *info, u8 reason)
489 {
490 unsigned long flags;
491
492 raw_spin_lock_irqsave(&info->lock, flags);
493
494 if (!info->mask_reason)
495 mask_evtchn(info->evtchn);
496
497 info->mask_reason |= reason;
498
499 raw_spin_unlock_irqrestore(&info->lock, flags);
500 }
501
do_unmask(struct irq_info * info,u8 reason)502 static void do_unmask(struct irq_info *info, u8 reason)
503 {
504 unsigned long flags;
505
506 raw_spin_lock_irqsave(&info->lock, flags);
507
508 info->mask_reason &= ~reason;
509
510 if (!info->mask_reason)
511 unmask_evtchn(info->evtchn);
512
513 raw_spin_unlock_irqrestore(&info->lock, flags);
514 }
515
516 #ifdef CONFIG_X86
pirq_check_eoi_map(unsigned irq)517 static bool pirq_check_eoi_map(unsigned irq)
518 {
519 return test_bit(pirq_from_irq(irq), pirq_eoi_map);
520 }
521 #endif
522
pirq_needs_eoi_flag(unsigned irq)523 static bool pirq_needs_eoi_flag(unsigned irq)
524 {
525 struct irq_info *info = info_for_irq(irq);
526 BUG_ON(info->type != IRQT_PIRQ);
527
528 return info->u.pirq.flags & PIRQ_NEEDS_EOI;
529 }
530
bind_evtchn_to_cpu(evtchn_port_t evtchn,unsigned int cpu,bool force_affinity)531 static void bind_evtchn_to_cpu(evtchn_port_t evtchn, unsigned int cpu,
532 bool force_affinity)
533 {
534 int irq = get_evtchn_to_irq(evtchn);
535 struct irq_info *info = info_for_irq(irq);
536
537 BUG_ON(irq == -1);
538
539 if (IS_ENABLED(CONFIG_SMP) && force_affinity) {
540 struct irq_data *data = irq_get_irq_data(irq);
541
542 irq_data_update_affinity(data, cpumask_of(cpu));
543 irq_data_update_effective_affinity(data, cpumask_of(cpu));
544 }
545
546 xen_evtchn_port_bind_to_cpu(evtchn, cpu, info->cpu);
547
548 channels_on_cpu_dec(info);
549 info->cpu = cpu;
550 channels_on_cpu_inc(info);
551 }
552
553 /**
554 * notify_remote_via_irq - send event to remote end of event channel via irq
555 * @irq: irq of event channel to send event to
556 *
557 * Unlike notify_remote_via_evtchn(), this is safe to use across
558 * save/restore. Notifications on a broken connection are silently
559 * dropped.
560 */
notify_remote_via_irq(int irq)561 void notify_remote_via_irq(int irq)
562 {
563 evtchn_port_t evtchn = evtchn_from_irq(irq);
564
565 if (VALID_EVTCHN(evtchn))
566 notify_remote_via_evtchn(evtchn);
567 }
568 EXPORT_SYMBOL_GPL(notify_remote_via_irq);
569
570 struct lateeoi_work {
571 struct delayed_work delayed;
572 spinlock_t eoi_list_lock;
573 struct list_head eoi_list;
574 };
575
576 static DEFINE_PER_CPU(struct lateeoi_work, lateeoi);
577
lateeoi_list_del(struct irq_info * info)578 static void lateeoi_list_del(struct irq_info *info)
579 {
580 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
581 unsigned long flags;
582
583 spin_lock_irqsave(&eoi->eoi_list_lock, flags);
584 list_del_init(&info->eoi_list);
585 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
586 }
587
lateeoi_list_add(struct irq_info * info)588 static void lateeoi_list_add(struct irq_info *info)
589 {
590 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
591 struct irq_info *elem;
592 u64 now = get_jiffies_64();
593 unsigned long delay;
594 unsigned long flags;
595
596 if (now < info->eoi_time)
597 delay = info->eoi_time - now;
598 else
599 delay = 1;
600
601 spin_lock_irqsave(&eoi->eoi_list_lock, flags);
602
603 elem = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
604 eoi_list);
605 if (!elem || info->eoi_time < elem->eoi_time) {
606 list_add(&info->eoi_list, &eoi->eoi_list);
607 mod_delayed_work_on(info->eoi_cpu, system_wq,
608 &eoi->delayed, delay);
609 } else {
610 list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) {
611 if (elem->eoi_time <= info->eoi_time)
612 break;
613 }
614 list_add(&info->eoi_list, &elem->eoi_list);
615 }
616
617 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
618 }
619
xen_irq_lateeoi_locked(struct irq_info * info,bool spurious)620 static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious)
621 {
622 evtchn_port_t evtchn;
623 unsigned int cpu;
624 unsigned int delay = 0;
625
626 evtchn = info->evtchn;
627 if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list))
628 return;
629
630 if (spurious) {
631 struct xenbus_device *dev = info->u.interdomain;
632 unsigned int threshold = 1;
633
634 if (dev && dev->spurious_threshold)
635 threshold = dev->spurious_threshold;
636
637 if ((1 << info->spurious_cnt) < (HZ << 2)) {
638 if (info->spurious_cnt != 0xFF)
639 info->spurious_cnt++;
640 }
641 if (info->spurious_cnt > threshold) {
642 delay = 1 << (info->spurious_cnt - 1 - threshold);
643 if (delay > HZ)
644 delay = HZ;
645 if (!info->eoi_time)
646 info->eoi_cpu = smp_processor_id();
647 info->eoi_time = get_jiffies_64() + delay;
648 if (dev)
649 atomic_add(delay, &dev->jiffies_eoi_delayed);
650 }
651 if (dev)
652 atomic_inc(&dev->spurious_events);
653 } else {
654 info->spurious_cnt = 0;
655 }
656
657 cpu = info->eoi_cpu;
658 if (info->eoi_time &&
659 (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) {
660 lateeoi_list_add(info);
661 return;
662 }
663
664 info->eoi_time = 0;
665
666 /* is_active hasn't been reset yet, do it now. */
667 smp_store_release(&info->is_active, 0);
668 do_unmask(info, EVT_MASK_REASON_EOI_PENDING);
669 }
670
xen_irq_lateeoi_worker(struct work_struct * work)671 static void xen_irq_lateeoi_worker(struct work_struct *work)
672 {
673 struct lateeoi_work *eoi;
674 struct irq_info *info;
675 u64 now = get_jiffies_64();
676 unsigned long flags;
677
678 eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed);
679
680 rcu_read_lock();
681
682 while (true) {
683 spin_lock_irqsave(&eoi->eoi_list_lock, flags);
684
685 info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
686 eoi_list);
687
688 if (info == NULL)
689 break;
690
691 if (now < info->eoi_time) {
692 mod_delayed_work_on(info->eoi_cpu, system_wq,
693 &eoi->delayed,
694 info->eoi_time - now);
695 break;
696 }
697
698 list_del_init(&info->eoi_list);
699
700 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
701
702 info->eoi_time = 0;
703
704 xen_irq_lateeoi_locked(info, false);
705 }
706
707 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
708
709 rcu_read_unlock();
710 }
711
xen_cpu_init_eoi(unsigned int cpu)712 static void xen_cpu_init_eoi(unsigned int cpu)
713 {
714 struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu);
715
716 INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker);
717 spin_lock_init(&eoi->eoi_list_lock);
718 INIT_LIST_HEAD(&eoi->eoi_list);
719 }
720
xen_irq_lateeoi(unsigned int irq,unsigned int eoi_flags)721 void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags)
722 {
723 struct irq_info *info;
724
725 rcu_read_lock();
726
727 info = info_for_irq(irq);
728
729 if (info)
730 xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS);
731
732 rcu_read_unlock();
733 }
734 EXPORT_SYMBOL_GPL(xen_irq_lateeoi);
735
xen_irq_init(unsigned irq)736 static void xen_irq_init(unsigned irq)
737 {
738 struct irq_info *info;
739
740 info = kzalloc(sizeof(*info), GFP_KERNEL);
741 if (info == NULL)
742 panic("Unable to allocate metadata for IRQ%d\n", irq);
743
744 info->type = IRQT_UNBOUND;
745 info->refcnt = -1;
746 INIT_RCU_WORK(&info->rwork, delayed_free_irq);
747
748 set_info_for_irq(irq, info);
749 /*
750 * Interrupt affinity setting can be immediate. No point
751 * in delaying it until an interrupt is handled.
752 */
753 irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
754
755 INIT_LIST_HEAD(&info->eoi_list);
756 list_add_tail(&info->list, &xen_irq_list_head);
757 }
758
xen_allocate_irqs_dynamic(int nvec)759 static int __must_check xen_allocate_irqs_dynamic(int nvec)
760 {
761 int i, irq = irq_alloc_descs(-1, 0, nvec, -1);
762
763 if (irq >= 0) {
764 for (i = 0; i < nvec; i++)
765 xen_irq_init(irq + i);
766 }
767
768 return irq;
769 }
770
xen_allocate_irq_dynamic(void)771 static inline int __must_check xen_allocate_irq_dynamic(void)
772 {
773
774 return xen_allocate_irqs_dynamic(1);
775 }
776
xen_allocate_irq_gsi(unsigned gsi)777 static int __must_check xen_allocate_irq_gsi(unsigned gsi)
778 {
779 int irq;
780
781 /*
782 * A PV guest has no concept of a GSI (since it has no ACPI
783 * nor access to/knowledge of the physical APICs). Therefore
784 * all IRQs are dynamically allocated from the entire IRQ
785 * space.
786 */
787 if (xen_pv_domain() && !xen_initial_domain())
788 return xen_allocate_irq_dynamic();
789
790 /* Legacy IRQ descriptors are already allocated by the arch. */
791 if (gsi < nr_legacy_irqs())
792 irq = gsi;
793 else
794 irq = irq_alloc_desc_at(gsi, -1);
795
796 xen_irq_init(irq);
797
798 return irq;
799 }
800
xen_free_irq(unsigned irq)801 static void xen_free_irq(unsigned irq)
802 {
803 struct irq_info *info = info_for_irq(irq);
804
805 if (WARN_ON(!info))
806 return;
807
808 if (!list_empty(&info->eoi_list))
809 lateeoi_list_del(info);
810
811 list_del(&info->list);
812
813 WARN_ON(info->refcnt > 0);
814
815 queue_rcu_work(system_wq, &info->rwork);
816 }
817
xen_evtchn_close(evtchn_port_t port)818 static void xen_evtchn_close(evtchn_port_t port)
819 {
820 struct evtchn_close close;
821
822 close.port = port;
823 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
824 BUG();
825 }
826
827 /* Not called for lateeoi events. */
event_handler_exit(struct irq_info * info)828 static void event_handler_exit(struct irq_info *info)
829 {
830 smp_store_release(&info->is_active, 0);
831 clear_evtchn(info->evtchn);
832 }
833
pirq_query_unmask(int irq)834 static void pirq_query_unmask(int irq)
835 {
836 struct physdev_irq_status_query irq_status;
837 struct irq_info *info = info_for_irq(irq);
838
839 BUG_ON(info->type != IRQT_PIRQ);
840
841 irq_status.irq = pirq_from_irq(irq);
842 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
843 irq_status.flags = 0;
844
845 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
846 if (irq_status.flags & XENIRQSTAT_needs_eoi)
847 info->u.pirq.flags |= PIRQ_NEEDS_EOI;
848 }
849
eoi_pirq(struct irq_data * data)850 static void eoi_pirq(struct irq_data *data)
851 {
852 struct irq_info *info = info_for_irq(data->irq);
853 evtchn_port_t evtchn = info ? info->evtchn : 0;
854 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
855 int rc = 0;
856
857 if (!VALID_EVTCHN(evtchn))
858 return;
859
860 event_handler_exit(info);
861
862 if (pirq_needs_eoi(data->irq)) {
863 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
864 WARN_ON(rc);
865 }
866 }
867
mask_ack_pirq(struct irq_data * data)868 static void mask_ack_pirq(struct irq_data *data)
869 {
870 disable_dynirq(data);
871 eoi_pirq(data);
872 }
873
__startup_pirq(unsigned int irq)874 static unsigned int __startup_pirq(unsigned int irq)
875 {
876 struct evtchn_bind_pirq bind_pirq;
877 struct irq_info *info = info_for_irq(irq);
878 evtchn_port_t evtchn = evtchn_from_irq(irq);
879 int rc;
880
881 BUG_ON(info->type != IRQT_PIRQ);
882
883 if (VALID_EVTCHN(evtchn))
884 goto out;
885
886 bind_pirq.pirq = pirq_from_irq(irq);
887 /* NB. We are happy to share unless we are probing. */
888 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
889 BIND_PIRQ__WILL_SHARE : 0;
890 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
891 if (rc != 0) {
892 pr_warn("Failed to obtain physical IRQ %d\n", irq);
893 return 0;
894 }
895 evtchn = bind_pirq.port;
896
897 pirq_query_unmask(irq);
898
899 rc = set_evtchn_to_irq(evtchn, irq);
900 if (rc)
901 goto err;
902
903 info->evtchn = evtchn;
904 bind_evtchn_to_cpu(evtchn, 0, false);
905
906 rc = xen_evtchn_port_setup(evtchn);
907 if (rc)
908 goto err;
909
910 out:
911 do_unmask(info, EVT_MASK_REASON_EXPLICIT);
912
913 eoi_pirq(irq_get_irq_data(irq));
914
915 return 0;
916
917 err:
918 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
919 xen_evtchn_close(evtchn);
920 return 0;
921 }
922
startup_pirq(struct irq_data * data)923 static unsigned int startup_pirq(struct irq_data *data)
924 {
925 return __startup_pirq(data->irq);
926 }
927
shutdown_pirq(struct irq_data * data)928 static void shutdown_pirq(struct irq_data *data)
929 {
930 unsigned int irq = data->irq;
931 struct irq_info *info = info_for_irq(irq);
932 evtchn_port_t evtchn = evtchn_from_irq(irq);
933
934 BUG_ON(info->type != IRQT_PIRQ);
935
936 if (!VALID_EVTCHN(evtchn))
937 return;
938
939 do_mask(info, EVT_MASK_REASON_EXPLICIT);
940 xen_evtchn_close(evtchn);
941 xen_irq_info_cleanup(info);
942 }
943
enable_pirq(struct irq_data * data)944 static void enable_pirq(struct irq_data *data)
945 {
946 enable_dynirq(data);
947 }
948
disable_pirq(struct irq_data * data)949 static void disable_pirq(struct irq_data *data)
950 {
951 disable_dynirq(data);
952 }
953
xen_irq_from_gsi(unsigned gsi)954 int xen_irq_from_gsi(unsigned gsi)
955 {
956 struct irq_info *info;
957
958 list_for_each_entry(info, &xen_irq_list_head, list) {
959 if (info->type != IRQT_PIRQ)
960 continue;
961
962 if (info->u.pirq.gsi == gsi)
963 return info->irq;
964 }
965
966 return -1;
967 }
968 EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
969
__unbind_from_irq(unsigned int irq)970 static void __unbind_from_irq(unsigned int irq)
971 {
972 evtchn_port_t evtchn = evtchn_from_irq(irq);
973 struct irq_info *info = info_for_irq(irq);
974
975 if (info->refcnt > 0) {
976 info->refcnt--;
977 if (info->refcnt != 0)
978 return;
979 }
980
981 if (VALID_EVTCHN(evtchn)) {
982 unsigned int cpu = cpu_from_irq(irq);
983 struct xenbus_device *dev;
984
985 xen_evtchn_close(evtchn);
986
987 switch (type_from_irq(irq)) {
988 case IRQT_VIRQ:
989 per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1;
990 break;
991 case IRQT_IPI:
992 per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1;
993 break;
994 case IRQT_EVTCHN:
995 dev = info->u.interdomain;
996 if (dev)
997 atomic_dec(&dev->event_channels);
998 break;
999 default:
1000 break;
1001 }
1002
1003 xen_irq_info_cleanup(info);
1004 }
1005
1006 xen_free_irq(irq);
1007 }
1008
1009 /*
1010 * Do not make any assumptions regarding the relationship between the
1011 * IRQ number returned here and the Xen pirq argument.
1012 *
1013 * Note: We don't assign an event channel until the irq actually started
1014 * up. Return an existing irq if we've already got one for the gsi.
1015 *
1016 * Shareable implies level triggered, not shareable implies edge
1017 * triggered here.
1018 */
xen_bind_pirq_gsi_to_irq(unsigned gsi,unsigned pirq,int shareable,char * name)1019 int xen_bind_pirq_gsi_to_irq(unsigned gsi,
1020 unsigned pirq, int shareable, char *name)
1021 {
1022 int irq;
1023 struct physdev_irq irq_op;
1024 int ret;
1025
1026 mutex_lock(&irq_mapping_update_lock);
1027
1028 irq = xen_irq_from_gsi(gsi);
1029 if (irq != -1) {
1030 pr_info("%s: returning irq %d for gsi %u\n",
1031 __func__, irq, gsi);
1032 goto out;
1033 }
1034
1035 irq = xen_allocate_irq_gsi(gsi);
1036 if (irq < 0)
1037 goto out;
1038
1039 irq_op.irq = irq;
1040 irq_op.vector = 0;
1041
1042 /* Only the privileged domain can do this. For non-priv, the pcifront
1043 * driver provides a PCI bus that does the call to do exactly
1044 * this in the priv domain. */
1045 if (xen_initial_domain() &&
1046 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
1047 xen_free_irq(irq);
1048 irq = -ENOSPC;
1049 goto out;
1050 }
1051
1052 ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF,
1053 shareable ? PIRQ_SHAREABLE : 0);
1054 if (ret < 0) {
1055 __unbind_from_irq(irq);
1056 irq = ret;
1057 goto out;
1058 }
1059
1060 pirq_query_unmask(irq);
1061 /* We try to use the handler with the appropriate semantic for the
1062 * type of interrupt: if the interrupt is an edge triggered
1063 * interrupt we use handle_edge_irq.
1064 *
1065 * On the other hand if the interrupt is level triggered we use
1066 * handle_fasteoi_irq like the native code does for this kind of
1067 * interrupts.
1068 *
1069 * Depending on the Xen version, pirq_needs_eoi might return true
1070 * not only for level triggered interrupts but for edge triggered
1071 * interrupts too. In any case Xen always honors the eoi mechanism,
1072 * not injecting any more pirqs of the same kind if the first one
1073 * hasn't received an eoi yet. Therefore using the fasteoi handler
1074 * is the right choice either way.
1075 */
1076 if (shareable)
1077 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
1078 handle_fasteoi_irq, name);
1079 else
1080 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
1081 handle_edge_irq, name);
1082
1083 out:
1084 mutex_unlock(&irq_mapping_update_lock);
1085
1086 return irq;
1087 }
1088
1089 #ifdef CONFIG_PCI_MSI
xen_allocate_pirq_msi(struct pci_dev * dev,struct msi_desc * msidesc)1090 int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
1091 {
1092 int rc;
1093 struct physdev_get_free_pirq op_get_free_pirq;
1094
1095 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
1096 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
1097
1098 WARN_ONCE(rc == -ENOSYS,
1099 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
1100
1101 return rc ? -1 : op_get_free_pirq.pirq;
1102 }
1103
xen_bind_pirq_msi_to_irq(struct pci_dev * dev,struct msi_desc * msidesc,int pirq,int nvec,const char * name,domid_t domid)1104 int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
1105 int pirq, int nvec, const char *name, domid_t domid)
1106 {
1107 int i, irq, ret;
1108
1109 mutex_lock(&irq_mapping_update_lock);
1110
1111 irq = xen_allocate_irqs_dynamic(nvec);
1112 if (irq < 0)
1113 goto out;
1114
1115 for (i = 0; i < nvec; i++) {
1116 irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
1117
1118 ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid,
1119 i == 0 ? 0 : PIRQ_MSI_GROUP);
1120 if (ret < 0)
1121 goto error_irq;
1122 }
1123
1124 ret = irq_set_msi_desc(irq, msidesc);
1125 if (ret < 0)
1126 goto error_irq;
1127 out:
1128 mutex_unlock(&irq_mapping_update_lock);
1129 return irq;
1130 error_irq:
1131 while (nvec--)
1132 __unbind_from_irq(irq + nvec);
1133 mutex_unlock(&irq_mapping_update_lock);
1134 return ret;
1135 }
1136 #endif
1137
xen_destroy_irq(int irq)1138 int xen_destroy_irq(int irq)
1139 {
1140 struct physdev_unmap_pirq unmap_irq;
1141 struct irq_info *info = info_for_irq(irq);
1142 int rc = -ENOENT;
1143
1144 mutex_lock(&irq_mapping_update_lock);
1145
1146 /*
1147 * If trying to remove a vector in a MSI group different
1148 * than the first one skip the PIRQ unmap unless this vector
1149 * is the first one in the group.
1150 */
1151 if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
1152 unmap_irq.pirq = info->u.pirq.pirq;
1153 unmap_irq.domid = info->u.pirq.domid;
1154 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
1155 /* If another domain quits without making the pci_disable_msix
1156 * call, the Xen hypervisor takes care of freeing the PIRQs
1157 * (free_domain_pirqs).
1158 */
1159 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
1160 pr_info("domain %d does not have %d anymore\n",
1161 info->u.pirq.domid, info->u.pirq.pirq);
1162 else if (rc) {
1163 pr_warn("unmap irq failed %d\n", rc);
1164 goto out;
1165 }
1166 }
1167
1168 xen_free_irq(irq);
1169
1170 out:
1171 mutex_unlock(&irq_mapping_update_lock);
1172 return rc;
1173 }
1174
xen_irq_from_pirq(unsigned pirq)1175 int xen_irq_from_pirq(unsigned pirq)
1176 {
1177 int irq;
1178
1179 struct irq_info *info;
1180
1181 mutex_lock(&irq_mapping_update_lock);
1182
1183 list_for_each_entry(info, &xen_irq_list_head, list) {
1184 if (info->type != IRQT_PIRQ)
1185 continue;
1186 irq = info->irq;
1187 if (info->u.pirq.pirq == pirq)
1188 goto out;
1189 }
1190 irq = -1;
1191 out:
1192 mutex_unlock(&irq_mapping_update_lock);
1193
1194 return irq;
1195 }
1196
1197
xen_pirq_from_irq(unsigned irq)1198 int xen_pirq_from_irq(unsigned irq)
1199 {
1200 return pirq_from_irq(irq);
1201 }
1202 EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
1203
bind_evtchn_to_irq_chip(evtchn_port_t evtchn,struct irq_chip * chip,struct xenbus_device * dev)1204 static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip,
1205 struct xenbus_device *dev)
1206 {
1207 int irq;
1208 int ret;
1209
1210 if (evtchn >= xen_evtchn_max_channels())
1211 return -ENOMEM;
1212
1213 mutex_lock(&irq_mapping_update_lock);
1214
1215 irq = get_evtchn_to_irq(evtchn);
1216
1217 if (irq == -1) {
1218 irq = xen_allocate_irq_dynamic();
1219 if (irq < 0)
1220 goto out;
1221
1222 irq_set_chip_and_handler_name(irq, chip,
1223 handle_edge_irq, "event");
1224
1225 ret = xen_irq_info_evtchn_setup(irq, evtchn, dev);
1226 if (ret < 0) {
1227 __unbind_from_irq(irq);
1228 irq = ret;
1229 goto out;
1230 }
1231 /*
1232 * New interdomain events are initially bound to vCPU0 This
1233 * is required to setup the event channel in the first
1234 * place and also important for UP guests because the
1235 * affinity setting is not invoked on them so nothing would
1236 * bind the channel.
1237 */
1238 bind_evtchn_to_cpu(evtchn, 0, false);
1239 } else {
1240 struct irq_info *info = info_for_irq(irq);
1241 WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
1242 }
1243
1244 out:
1245 mutex_unlock(&irq_mapping_update_lock);
1246
1247 return irq;
1248 }
1249
bind_evtchn_to_irq(evtchn_port_t evtchn)1250 int bind_evtchn_to_irq(evtchn_port_t evtchn)
1251 {
1252 return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip, NULL);
1253 }
1254 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
1255
bind_evtchn_to_irq_lateeoi(evtchn_port_t evtchn)1256 int bind_evtchn_to_irq_lateeoi(evtchn_port_t evtchn)
1257 {
1258 return bind_evtchn_to_irq_chip(evtchn, &xen_lateeoi_chip, NULL);
1259 }
1260 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq_lateeoi);
1261
bind_ipi_to_irq(unsigned int ipi,unsigned int cpu)1262 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
1263 {
1264 struct evtchn_bind_ipi bind_ipi;
1265 evtchn_port_t evtchn;
1266 int ret, irq;
1267
1268 mutex_lock(&irq_mapping_update_lock);
1269
1270 irq = per_cpu(ipi_to_irq, cpu)[ipi];
1271
1272 if (irq == -1) {
1273 irq = xen_allocate_irq_dynamic();
1274 if (irq < 0)
1275 goto out;
1276
1277 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
1278 handle_percpu_irq, "ipi");
1279
1280 bind_ipi.vcpu = xen_vcpu_nr(cpu);
1281 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1282 &bind_ipi) != 0)
1283 BUG();
1284 evtchn = bind_ipi.port;
1285
1286 ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
1287 if (ret < 0) {
1288 __unbind_from_irq(irq);
1289 irq = ret;
1290 goto out;
1291 }
1292 /*
1293 * Force the affinity mask to the target CPU so proc shows
1294 * the correct target.
1295 */
1296 bind_evtchn_to_cpu(evtchn, cpu, true);
1297 } else {
1298 struct irq_info *info = info_for_irq(irq);
1299 WARN_ON(info == NULL || info->type != IRQT_IPI);
1300 }
1301
1302 out:
1303 mutex_unlock(&irq_mapping_update_lock);
1304 return irq;
1305 }
1306
bind_interdomain_evtchn_to_irq_chip(struct xenbus_device * dev,evtchn_port_t remote_port,struct irq_chip * chip)1307 static int bind_interdomain_evtchn_to_irq_chip(struct xenbus_device *dev,
1308 evtchn_port_t remote_port,
1309 struct irq_chip *chip)
1310 {
1311 struct evtchn_bind_interdomain bind_interdomain;
1312 int err;
1313
1314 bind_interdomain.remote_dom = dev->otherend_id;
1315 bind_interdomain.remote_port = remote_port;
1316
1317 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
1318 &bind_interdomain);
1319
1320 return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port,
1321 chip, dev);
1322 }
1323
bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device * dev,evtchn_port_t remote_port)1324 int bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device *dev,
1325 evtchn_port_t remote_port)
1326 {
1327 return bind_interdomain_evtchn_to_irq_chip(dev, remote_port,
1328 &xen_lateeoi_chip);
1329 }
1330 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi);
1331
find_virq(unsigned int virq,unsigned int cpu,evtchn_port_t * evtchn)1332 static int find_virq(unsigned int virq, unsigned int cpu, evtchn_port_t *evtchn)
1333 {
1334 struct evtchn_status status;
1335 evtchn_port_t port;
1336 int rc = -ENOENT;
1337
1338 memset(&status, 0, sizeof(status));
1339 for (port = 0; port < xen_evtchn_max_channels(); port++) {
1340 status.dom = DOMID_SELF;
1341 status.port = port;
1342 rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
1343 if (rc < 0)
1344 continue;
1345 if (status.status != EVTCHNSTAT_virq)
1346 continue;
1347 if (status.u.virq == virq && status.vcpu == xen_vcpu_nr(cpu)) {
1348 *evtchn = port;
1349 break;
1350 }
1351 }
1352 return rc;
1353 }
1354
1355 /**
1356 * xen_evtchn_nr_channels - number of usable event channel ports
1357 *
1358 * This may be less than the maximum supported by the current
1359 * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
1360 * supported.
1361 */
xen_evtchn_nr_channels(void)1362 unsigned xen_evtchn_nr_channels(void)
1363 {
1364 return evtchn_ops->nr_channels();
1365 }
1366 EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
1367
bind_virq_to_irq(unsigned int virq,unsigned int cpu,bool percpu)1368 int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
1369 {
1370 struct evtchn_bind_virq bind_virq;
1371 evtchn_port_t evtchn = 0;
1372 int irq, ret;
1373
1374 mutex_lock(&irq_mapping_update_lock);
1375
1376 irq = per_cpu(virq_to_irq, cpu)[virq];
1377
1378 if (irq == -1) {
1379 irq = xen_allocate_irq_dynamic();
1380 if (irq < 0)
1381 goto out;
1382
1383 if (percpu)
1384 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
1385 handle_percpu_irq, "virq");
1386 else
1387 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
1388 handle_edge_irq, "virq");
1389
1390 bind_virq.virq = virq;
1391 bind_virq.vcpu = xen_vcpu_nr(cpu);
1392 ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1393 &bind_virq);
1394 if (ret == 0)
1395 evtchn = bind_virq.port;
1396 else {
1397 if (ret == -EEXIST)
1398 ret = find_virq(virq, cpu, &evtchn);
1399 BUG_ON(ret < 0);
1400 }
1401
1402 ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
1403 if (ret < 0) {
1404 __unbind_from_irq(irq);
1405 irq = ret;
1406 goto out;
1407 }
1408
1409 /*
1410 * Force the affinity mask for percpu interrupts so proc
1411 * shows the correct target.
1412 */
1413 bind_evtchn_to_cpu(evtchn, cpu, percpu);
1414 } else {
1415 struct irq_info *info = info_for_irq(irq);
1416 WARN_ON(info == NULL || info->type != IRQT_VIRQ);
1417 }
1418
1419 out:
1420 mutex_unlock(&irq_mapping_update_lock);
1421
1422 return irq;
1423 }
1424
unbind_from_irq(unsigned int irq)1425 static void unbind_from_irq(unsigned int irq)
1426 {
1427 mutex_lock(&irq_mapping_update_lock);
1428 __unbind_from_irq(irq);
1429 mutex_unlock(&irq_mapping_update_lock);
1430 }
1431
bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id,struct irq_chip * chip)1432 static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn,
1433 irq_handler_t handler,
1434 unsigned long irqflags,
1435 const char *devname, void *dev_id,
1436 struct irq_chip *chip)
1437 {
1438 int irq, retval;
1439
1440 irq = bind_evtchn_to_irq_chip(evtchn, chip, NULL);
1441 if (irq < 0)
1442 return irq;
1443 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1444 if (retval != 0) {
1445 unbind_from_irq(irq);
1446 return retval;
1447 }
1448
1449 return irq;
1450 }
1451
bind_evtchn_to_irqhandler(evtchn_port_t evtchn,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id)1452 int bind_evtchn_to_irqhandler(evtchn_port_t evtchn,
1453 irq_handler_t handler,
1454 unsigned long irqflags,
1455 const char *devname, void *dev_id)
1456 {
1457 return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
1458 devname, dev_id,
1459 &xen_dynamic_chip);
1460 }
1461 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
1462
bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id)1463 int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn,
1464 irq_handler_t handler,
1465 unsigned long irqflags,
1466 const char *devname, void *dev_id)
1467 {
1468 return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
1469 devname, dev_id,
1470 &xen_lateeoi_chip);
1471 }
1472 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi);
1473
bind_interdomain_evtchn_to_irqhandler_chip(struct xenbus_device * dev,evtchn_port_t remote_port,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id,struct irq_chip * chip)1474 static int bind_interdomain_evtchn_to_irqhandler_chip(
1475 struct xenbus_device *dev, evtchn_port_t remote_port,
1476 irq_handler_t handler, unsigned long irqflags,
1477 const char *devname, void *dev_id, struct irq_chip *chip)
1478 {
1479 int irq, retval;
1480
1481 irq = bind_interdomain_evtchn_to_irq_chip(dev, remote_port, chip);
1482 if (irq < 0)
1483 return irq;
1484
1485 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1486 if (retval != 0) {
1487 unbind_from_irq(irq);
1488 return retval;
1489 }
1490
1491 return irq;
1492 }
1493
bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device * dev,evtchn_port_t remote_port,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id)1494 int bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device *dev,
1495 evtchn_port_t remote_port,
1496 irq_handler_t handler,
1497 unsigned long irqflags,
1498 const char *devname,
1499 void *dev_id)
1500 {
1501 return bind_interdomain_evtchn_to_irqhandler_chip(dev,
1502 remote_port, handler, irqflags, devname,
1503 dev_id, &xen_lateeoi_chip);
1504 }
1505 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi);
1506
bind_virq_to_irqhandler(unsigned int virq,unsigned int cpu,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id)1507 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
1508 irq_handler_t handler,
1509 unsigned long irqflags, const char *devname, void *dev_id)
1510 {
1511 int irq, retval;
1512
1513 irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
1514 if (irq < 0)
1515 return irq;
1516 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1517 if (retval != 0) {
1518 unbind_from_irq(irq);
1519 return retval;
1520 }
1521
1522 return irq;
1523 }
1524 EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
1525
bind_ipi_to_irqhandler(enum ipi_vector ipi,unsigned int cpu,irq_handler_t handler,unsigned long irqflags,const char * devname,void * dev_id)1526 int bind_ipi_to_irqhandler(enum ipi_vector ipi,
1527 unsigned int cpu,
1528 irq_handler_t handler,
1529 unsigned long irqflags,
1530 const char *devname,
1531 void *dev_id)
1532 {
1533 int irq, retval;
1534
1535 irq = bind_ipi_to_irq(ipi, cpu);
1536 if (irq < 0)
1537 return irq;
1538
1539 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
1540 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1541 if (retval != 0) {
1542 unbind_from_irq(irq);
1543 return retval;
1544 }
1545
1546 return irq;
1547 }
1548
unbind_from_irqhandler(unsigned int irq,void * dev_id)1549 void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1550 {
1551 struct irq_info *info = info_for_irq(irq);
1552
1553 if (WARN_ON(!info))
1554 return;
1555 free_irq(irq, dev_id);
1556 unbind_from_irq(irq);
1557 }
1558 EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
1559
1560 /**
1561 * xen_set_irq_priority() - set an event channel priority.
1562 * @irq:irq bound to an event channel.
1563 * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
1564 */
xen_set_irq_priority(unsigned irq,unsigned priority)1565 int xen_set_irq_priority(unsigned irq, unsigned priority)
1566 {
1567 struct evtchn_set_priority set_priority;
1568
1569 set_priority.port = evtchn_from_irq(irq);
1570 set_priority.priority = priority;
1571
1572 return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
1573 &set_priority);
1574 }
1575 EXPORT_SYMBOL_GPL(xen_set_irq_priority);
1576
evtchn_make_refcounted(evtchn_port_t evtchn)1577 int evtchn_make_refcounted(evtchn_port_t evtchn)
1578 {
1579 int irq = get_evtchn_to_irq(evtchn);
1580 struct irq_info *info;
1581
1582 if (irq == -1)
1583 return -ENOENT;
1584
1585 info = info_for_irq(irq);
1586
1587 if (!info)
1588 return -ENOENT;
1589
1590 WARN_ON(info->refcnt != -1);
1591
1592 info->refcnt = 1;
1593
1594 return 0;
1595 }
1596 EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
1597
evtchn_get(evtchn_port_t evtchn)1598 int evtchn_get(evtchn_port_t evtchn)
1599 {
1600 int irq;
1601 struct irq_info *info;
1602 int err = -ENOENT;
1603
1604 if (evtchn >= xen_evtchn_max_channels())
1605 return -EINVAL;
1606
1607 mutex_lock(&irq_mapping_update_lock);
1608
1609 irq = get_evtchn_to_irq(evtchn);
1610 if (irq == -1)
1611 goto done;
1612
1613 info = info_for_irq(irq);
1614
1615 if (!info)
1616 goto done;
1617
1618 err = -EINVAL;
1619 if (info->refcnt <= 0 || info->refcnt == SHRT_MAX)
1620 goto done;
1621
1622 info->refcnt++;
1623 err = 0;
1624 done:
1625 mutex_unlock(&irq_mapping_update_lock);
1626
1627 return err;
1628 }
1629 EXPORT_SYMBOL_GPL(evtchn_get);
1630
evtchn_put(evtchn_port_t evtchn)1631 void evtchn_put(evtchn_port_t evtchn)
1632 {
1633 int irq = get_evtchn_to_irq(evtchn);
1634 if (WARN_ON(irq == -1))
1635 return;
1636 unbind_from_irq(irq);
1637 }
1638 EXPORT_SYMBOL_GPL(evtchn_put);
1639
xen_send_IPI_one(unsigned int cpu,enum ipi_vector vector)1640 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1641 {
1642 int irq;
1643
1644 #ifdef CONFIG_X86
1645 if (unlikely(vector == XEN_NMI_VECTOR)) {
1646 int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu),
1647 NULL);
1648 if (rc < 0)
1649 printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
1650 return;
1651 }
1652 #endif
1653 irq = per_cpu(ipi_to_irq, cpu)[vector];
1654 BUG_ON(irq < 0);
1655 notify_remote_via_irq(irq);
1656 }
1657
1658 struct evtchn_loop_ctrl {
1659 ktime_t timeout;
1660 unsigned count;
1661 bool defer_eoi;
1662 };
1663
handle_irq_for_port(evtchn_port_t port,struct evtchn_loop_ctrl * ctrl)1664 void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl)
1665 {
1666 int irq;
1667 struct irq_info *info;
1668 struct xenbus_device *dev;
1669
1670 irq = get_evtchn_to_irq(port);
1671 if (irq == -1)
1672 return;
1673
1674 /*
1675 * Check for timeout every 256 events.
1676 * We are setting the timeout value only after the first 256
1677 * events in order to not hurt the common case of few loop
1678 * iterations. The 256 is basically an arbitrary value.
1679 *
1680 * In case we are hitting the timeout we need to defer all further
1681 * EOIs in order to ensure to leave the event handling loop rather
1682 * sooner than later.
1683 */
1684 if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) {
1685 ktime_t kt = ktime_get();
1686
1687 if (!ctrl->timeout) {
1688 kt = ktime_add_ms(kt,
1689 jiffies_to_msecs(event_loop_timeout));
1690 ctrl->timeout = kt;
1691 } else if (kt > ctrl->timeout) {
1692 ctrl->defer_eoi = true;
1693 }
1694 }
1695
1696 info = info_for_irq(irq);
1697 if (xchg_acquire(&info->is_active, 1))
1698 return;
1699
1700 dev = (info->type == IRQT_EVTCHN) ? info->u.interdomain : NULL;
1701 if (dev)
1702 atomic_inc(&dev->events);
1703
1704 if (ctrl->defer_eoi) {
1705 info->eoi_cpu = smp_processor_id();
1706 info->irq_epoch = __this_cpu_read(irq_epoch);
1707 info->eoi_time = get_jiffies_64() + event_eoi_delay;
1708 }
1709
1710 generic_handle_irq(irq);
1711 }
1712
xen_evtchn_do_upcall(void)1713 int xen_evtchn_do_upcall(void)
1714 {
1715 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1716 int ret = vcpu_info->evtchn_upcall_pending ? IRQ_HANDLED : IRQ_NONE;
1717 int cpu = smp_processor_id();
1718 struct evtchn_loop_ctrl ctrl = { 0 };
1719
1720 /*
1721 * When closing an event channel the associated IRQ must not be freed
1722 * until all cpus have left the event handling loop. This is ensured
1723 * by taking the rcu_read_lock() while handling events, as freeing of
1724 * the IRQ is handled via queue_rcu_work() _after_ closing the event
1725 * channel.
1726 */
1727 rcu_read_lock();
1728
1729 do {
1730 vcpu_info->evtchn_upcall_pending = 0;
1731
1732 xen_evtchn_handle_events(cpu, &ctrl);
1733
1734 BUG_ON(!irqs_disabled());
1735
1736 virt_rmb(); /* Hypervisor can set upcall pending. */
1737
1738 } while (vcpu_info->evtchn_upcall_pending);
1739
1740 rcu_read_unlock();
1741
1742 /*
1743 * Increment irq_epoch only now to defer EOIs only for
1744 * xen_irq_lateeoi() invocations occurring from inside the loop
1745 * above.
1746 */
1747 __this_cpu_inc(irq_epoch);
1748
1749 return ret;
1750 }
1751 EXPORT_SYMBOL_GPL(xen_evtchn_do_upcall);
1752
1753 /* Rebind a new event channel to an existing irq. */
rebind_evtchn_irq(evtchn_port_t evtchn,int irq)1754 void rebind_evtchn_irq(evtchn_port_t evtchn, int irq)
1755 {
1756 struct irq_info *info = info_for_irq(irq);
1757
1758 if (WARN_ON(!info))
1759 return;
1760
1761 /* Make sure the irq is masked, since the new event channel
1762 will also be masked. */
1763 disable_irq(irq);
1764
1765 mutex_lock(&irq_mapping_update_lock);
1766
1767 /* After resume the irq<->evtchn mappings are all cleared out */
1768 BUG_ON(get_evtchn_to_irq(evtchn) != -1);
1769 /* Expect irq to have been bound before,
1770 so there should be a proper type */
1771 BUG_ON(info->type == IRQT_UNBOUND);
1772
1773 (void)xen_irq_info_evtchn_setup(irq, evtchn, NULL);
1774
1775 mutex_unlock(&irq_mapping_update_lock);
1776
1777 bind_evtchn_to_cpu(evtchn, info->cpu, false);
1778
1779 /* Unmask the event channel. */
1780 enable_irq(irq);
1781 }
1782
1783 /* Rebind an evtchn so that it gets delivered to a specific cpu */
xen_rebind_evtchn_to_cpu(struct irq_info * info,unsigned int tcpu)1784 static int xen_rebind_evtchn_to_cpu(struct irq_info *info, unsigned int tcpu)
1785 {
1786 struct evtchn_bind_vcpu bind_vcpu;
1787 evtchn_port_t evtchn = info ? info->evtchn : 0;
1788
1789 if (!VALID_EVTCHN(evtchn))
1790 return -1;
1791
1792 if (!xen_support_evtchn_rebind())
1793 return -1;
1794
1795 /* Send future instances of this interrupt to other vcpu. */
1796 bind_vcpu.port = evtchn;
1797 bind_vcpu.vcpu = xen_vcpu_nr(tcpu);
1798
1799 /*
1800 * Mask the event while changing the VCPU binding to prevent
1801 * it being delivered on an unexpected VCPU.
1802 */
1803 do_mask(info, EVT_MASK_REASON_TEMPORARY);
1804
1805 /*
1806 * If this fails, it usually just indicates that we're dealing with a
1807 * virq or IPI channel, which don't actually need to be rebound. Ignore
1808 * it, but don't do the xenlinux-level rebind in that case.
1809 */
1810 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1811 bind_evtchn_to_cpu(evtchn, tcpu, false);
1812
1813 do_unmask(info, EVT_MASK_REASON_TEMPORARY);
1814
1815 return 0;
1816 }
1817
1818 /*
1819 * Find the CPU within @dest mask which has the least number of channels
1820 * assigned. This is not precise as the per cpu counts can be modified
1821 * concurrently.
1822 */
select_target_cpu(const struct cpumask * dest)1823 static unsigned int select_target_cpu(const struct cpumask *dest)
1824 {
1825 unsigned int cpu, best_cpu = UINT_MAX, minch = UINT_MAX;
1826
1827 for_each_cpu_and(cpu, dest, cpu_online_mask) {
1828 unsigned int curch = atomic_read(&channels_on_cpu[cpu]);
1829
1830 if (curch < minch) {
1831 minch = curch;
1832 best_cpu = cpu;
1833 }
1834 }
1835
1836 /*
1837 * Catch the unlikely case that dest contains no online CPUs. Can't
1838 * recurse.
1839 */
1840 if (best_cpu == UINT_MAX)
1841 return select_target_cpu(cpu_online_mask);
1842
1843 return best_cpu;
1844 }
1845
set_affinity_irq(struct irq_data * data,const struct cpumask * dest,bool force)1846 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1847 bool force)
1848 {
1849 unsigned int tcpu = select_target_cpu(dest);
1850 int ret;
1851
1852 ret = xen_rebind_evtchn_to_cpu(info_for_irq(data->irq), tcpu);
1853 if (!ret)
1854 irq_data_update_effective_affinity(data, cpumask_of(tcpu));
1855
1856 return ret;
1857 }
1858
enable_dynirq(struct irq_data * data)1859 static void enable_dynirq(struct irq_data *data)
1860 {
1861 struct irq_info *info = info_for_irq(data->irq);
1862 evtchn_port_t evtchn = info ? info->evtchn : 0;
1863
1864 if (VALID_EVTCHN(evtchn))
1865 do_unmask(info, EVT_MASK_REASON_EXPLICIT);
1866 }
1867
disable_dynirq(struct irq_data * data)1868 static void disable_dynirq(struct irq_data *data)
1869 {
1870 struct irq_info *info = info_for_irq(data->irq);
1871 evtchn_port_t evtchn = info ? info->evtchn : 0;
1872
1873 if (VALID_EVTCHN(evtchn))
1874 do_mask(info, EVT_MASK_REASON_EXPLICIT);
1875 }
1876
ack_dynirq(struct irq_data * data)1877 static void ack_dynirq(struct irq_data *data)
1878 {
1879 struct irq_info *info = info_for_irq(data->irq);
1880 evtchn_port_t evtchn = info ? info->evtchn : 0;
1881
1882 if (VALID_EVTCHN(evtchn))
1883 event_handler_exit(info);
1884 }
1885
mask_ack_dynirq(struct irq_data * data)1886 static void mask_ack_dynirq(struct irq_data *data)
1887 {
1888 disable_dynirq(data);
1889 ack_dynirq(data);
1890 }
1891
lateeoi_ack_dynirq(struct irq_data * data)1892 static void lateeoi_ack_dynirq(struct irq_data *data)
1893 {
1894 struct irq_info *info = info_for_irq(data->irq);
1895 evtchn_port_t evtchn = info ? info->evtchn : 0;
1896
1897 if (VALID_EVTCHN(evtchn)) {
1898 do_mask(info, EVT_MASK_REASON_EOI_PENDING);
1899 /*
1900 * Don't call event_handler_exit().
1901 * Need to keep is_active non-zero in order to ignore re-raised
1902 * events after cpu affinity changes while a lateeoi is pending.
1903 */
1904 clear_evtchn(evtchn);
1905 }
1906 }
1907
lateeoi_mask_ack_dynirq(struct irq_data * data)1908 static void lateeoi_mask_ack_dynirq(struct irq_data *data)
1909 {
1910 struct irq_info *info = info_for_irq(data->irq);
1911 evtchn_port_t evtchn = info ? info->evtchn : 0;
1912
1913 if (VALID_EVTCHN(evtchn)) {
1914 do_mask(info, EVT_MASK_REASON_EXPLICIT);
1915 event_handler_exit(info);
1916 }
1917 }
1918
retrigger_dynirq(struct irq_data * data)1919 static int retrigger_dynirq(struct irq_data *data)
1920 {
1921 struct irq_info *info = info_for_irq(data->irq);
1922 evtchn_port_t evtchn = info ? info->evtchn : 0;
1923
1924 if (!VALID_EVTCHN(evtchn))
1925 return 0;
1926
1927 do_mask(info, EVT_MASK_REASON_TEMPORARY);
1928 set_evtchn(evtchn);
1929 do_unmask(info, EVT_MASK_REASON_TEMPORARY);
1930
1931 return 1;
1932 }
1933
restore_pirqs(void)1934 static void restore_pirqs(void)
1935 {
1936 int pirq, rc, irq, gsi;
1937 struct physdev_map_pirq map_irq;
1938 struct irq_info *info;
1939
1940 list_for_each_entry(info, &xen_irq_list_head, list) {
1941 if (info->type != IRQT_PIRQ)
1942 continue;
1943
1944 pirq = info->u.pirq.pirq;
1945 gsi = info->u.pirq.gsi;
1946 irq = info->irq;
1947
1948 /* save/restore of PT devices doesn't work, so at this point the
1949 * only devices present are GSI based emulated devices */
1950 if (!gsi)
1951 continue;
1952
1953 map_irq.domid = DOMID_SELF;
1954 map_irq.type = MAP_PIRQ_TYPE_GSI;
1955 map_irq.index = gsi;
1956 map_irq.pirq = pirq;
1957
1958 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1959 if (rc) {
1960 pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1961 gsi, irq, pirq, rc);
1962 xen_free_irq(irq);
1963 continue;
1964 }
1965
1966 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1967
1968 __startup_pirq(irq);
1969 }
1970 }
1971
restore_cpu_virqs(unsigned int cpu)1972 static void restore_cpu_virqs(unsigned int cpu)
1973 {
1974 struct evtchn_bind_virq bind_virq;
1975 evtchn_port_t evtchn;
1976 int virq, irq;
1977
1978 for (virq = 0; virq < NR_VIRQS; virq++) {
1979 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1980 continue;
1981
1982 BUG_ON(virq_from_irq(irq) != virq);
1983
1984 /* Get a new binding from Xen. */
1985 bind_virq.virq = virq;
1986 bind_virq.vcpu = xen_vcpu_nr(cpu);
1987 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1988 &bind_virq) != 0)
1989 BUG();
1990 evtchn = bind_virq.port;
1991
1992 /* Record the new mapping. */
1993 (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
1994 /* The affinity mask is still valid */
1995 bind_evtchn_to_cpu(evtchn, cpu, false);
1996 }
1997 }
1998
restore_cpu_ipis(unsigned int cpu)1999 static void restore_cpu_ipis(unsigned int cpu)
2000 {
2001 struct evtchn_bind_ipi bind_ipi;
2002 evtchn_port_t evtchn;
2003 int ipi, irq;
2004
2005 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
2006 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
2007 continue;
2008
2009 BUG_ON(ipi_from_irq(irq) != ipi);
2010
2011 /* Get a new binding from Xen. */
2012 bind_ipi.vcpu = xen_vcpu_nr(cpu);
2013 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
2014 &bind_ipi) != 0)
2015 BUG();
2016 evtchn = bind_ipi.port;
2017
2018 /* Record the new mapping. */
2019 (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
2020 /* The affinity mask is still valid */
2021 bind_evtchn_to_cpu(evtchn, cpu, false);
2022 }
2023 }
2024
2025 /* Clear an irq's pending state, in preparation for polling on it */
xen_clear_irq_pending(int irq)2026 void xen_clear_irq_pending(int irq)
2027 {
2028 struct irq_info *info = info_for_irq(irq);
2029 evtchn_port_t evtchn = info ? info->evtchn : 0;
2030
2031 if (VALID_EVTCHN(evtchn))
2032 event_handler_exit(info);
2033 }
2034 EXPORT_SYMBOL(xen_clear_irq_pending);
xen_set_irq_pending(int irq)2035 void xen_set_irq_pending(int irq)
2036 {
2037 evtchn_port_t evtchn = evtchn_from_irq(irq);
2038
2039 if (VALID_EVTCHN(evtchn))
2040 set_evtchn(evtchn);
2041 }
2042
xen_test_irq_pending(int irq)2043 bool xen_test_irq_pending(int irq)
2044 {
2045 evtchn_port_t evtchn = evtchn_from_irq(irq);
2046 bool ret = false;
2047
2048 if (VALID_EVTCHN(evtchn))
2049 ret = test_evtchn(evtchn);
2050
2051 return ret;
2052 }
2053
2054 /* Poll waiting for an irq to become pending with timeout. In the usual case,
2055 * the irq will be disabled so it won't deliver an interrupt. */
xen_poll_irq_timeout(int irq,u64 timeout)2056 void xen_poll_irq_timeout(int irq, u64 timeout)
2057 {
2058 evtchn_port_t evtchn = evtchn_from_irq(irq);
2059
2060 if (VALID_EVTCHN(evtchn)) {
2061 struct sched_poll poll;
2062
2063 poll.nr_ports = 1;
2064 poll.timeout = timeout;
2065 set_xen_guest_handle(poll.ports, &evtchn);
2066
2067 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
2068 BUG();
2069 }
2070 }
2071 EXPORT_SYMBOL(xen_poll_irq_timeout);
2072 /* Poll waiting for an irq to become pending. In the usual case, the
2073 * irq will be disabled so it won't deliver an interrupt. */
xen_poll_irq(int irq)2074 void xen_poll_irq(int irq)
2075 {
2076 xen_poll_irq_timeout(irq, 0 /* no timeout */);
2077 }
2078
2079 /* Check whether the IRQ line is shared with other guests. */
xen_test_irq_shared(int irq)2080 int xen_test_irq_shared(int irq)
2081 {
2082 struct irq_info *info = info_for_irq(irq);
2083 struct physdev_irq_status_query irq_status;
2084
2085 if (WARN_ON(!info))
2086 return -ENOENT;
2087
2088 irq_status.irq = info->u.pirq.pirq;
2089
2090 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
2091 return 0;
2092 return !(irq_status.flags & XENIRQSTAT_shared);
2093 }
2094 EXPORT_SYMBOL_GPL(xen_test_irq_shared);
2095
xen_irq_resume(void)2096 void xen_irq_resume(void)
2097 {
2098 unsigned int cpu;
2099 struct irq_info *info;
2100
2101 /* New event-channel space is not 'live' yet. */
2102 xen_evtchn_resume();
2103
2104 /* No IRQ <-> event-channel mappings. */
2105 list_for_each_entry(info, &xen_irq_list_head, list) {
2106 /* Zap event-channel binding */
2107 info->evtchn = 0;
2108 /* Adjust accounting */
2109 channels_on_cpu_dec(info);
2110 }
2111
2112 clear_evtchn_to_irq_all();
2113
2114 for_each_possible_cpu(cpu) {
2115 restore_cpu_virqs(cpu);
2116 restore_cpu_ipis(cpu);
2117 }
2118
2119 restore_pirqs();
2120 }
2121
2122 static struct irq_chip xen_dynamic_chip __read_mostly = {
2123 .name = "xen-dyn",
2124
2125 .irq_disable = disable_dynirq,
2126 .irq_mask = disable_dynirq,
2127 .irq_unmask = enable_dynirq,
2128
2129 .irq_ack = ack_dynirq,
2130 .irq_mask_ack = mask_ack_dynirq,
2131
2132 .irq_set_affinity = set_affinity_irq,
2133 .irq_retrigger = retrigger_dynirq,
2134 };
2135
2136 static struct irq_chip xen_lateeoi_chip __read_mostly = {
2137 /* The chip name needs to contain "xen-dyn" for irqbalance to work. */
2138 .name = "xen-dyn-lateeoi",
2139
2140 .irq_disable = disable_dynirq,
2141 .irq_mask = disable_dynirq,
2142 .irq_unmask = enable_dynirq,
2143
2144 .irq_ack = lateeoi_ack_dynirq,
2145 .irq_mask_ack = lateeoi_mask_ack_dynirq,
2146
2147 .irq_set_affinity = set_affinity_irq,
2148 .irq_retrigger = retrigger_dynirq,
2149 };
2150
2151 static struct irq_chip xen_pirq_chip __read_mostly = {
2152 .name = "xen-pirq",
2153
2154 .irq_startup = startup_pirq,
2155 .irq_shutdown = shutdown_pirq,
2156 .irq_enable = enable_pirq,
2157 .irq_disable = disable_pirq,
2158
2159 .irq_mask = disable_dynirq,
2160 .irq_unmask = enable_dynirq,
2161
2162 .irq_ack = eoi_pirq,
2163 .irq_eoi = eoi_pirq,
2164 .irq_mask_ack = mask_ack_pirq,
2165
2166 .irq_set_affinity = set_affinity_irq,
2167
2168 .irq_retrigger = retrigger_dynirq,
2169 };
2170
2171 static struct irq_chip xen_percpu_chip __read_mostly = {
2172 .name = "xen-percpu",
2173
2174 .irq_disable = disable_dynirq,
2175 .irq_mask = disable_dynirq,
2176 .irq_unmask = enable_dynirq,
2177
2178 .irq_ack = ack_dynirq,
2179 };
2180
2181 #ifdef CONFIG_X86
2182 #ifdef CONFIG_XEN_PVHVM
2183 /* Vector callbacks are better than PCI interrupts to receive event
2184 * channel notifications because we can receive vector callbacks on any
2185 * vcpu and we don't need PCI support or APIC interactions. */
xen_setup_callback_vector(void)2186 void xen_setup_callback_vector(void)
2187 {
2188 uint64_t callback_via;
2189
2190 if (xen_have_vector_callback) {
2191 callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
2192 if (xen_set_callback_via(callback_via)) {
2193 pr_err("Request for Xen HVM callback vector failed\n");
2194 xen_have_vector_callback = false;
2195 }
2196 }
2197 }
2198
2199 /*
2200 * Setup per-vCPU vector-type callbacks. If this setup is unavailable,
2201 * fallback to the global vector-type callback.
2202 */
xen_init_setup_upcall_vector(void)2203 static __init void xen_init_setup_upcall_vector(void)
2204 {
2205 if (!xen_have_vector_callback)
2206 return;
2207
2208 if ((cpuid_eax(xen_cpuid_base() + 4) & XEN_HVM_CPUID_UPCALL_VECTOR) &&
2209 !xen_set_upcall_vector(0))
2210 xen_percpu_upcall = true;
2211 else if (xen_feature(XENFEAT_hvm_callback_vector))
2212 xen_setup_callback_vector();
2213 else
2214 xen_have_vector_callback = false;
2215 }
2216
xen_set_upcall_vector(unsigned int cpu)2217 int xen_set_upcall_vector(unsigned int cpu)
2218 {
2219 int rc;
2220 xen_hvm_evtchn_upcall_vector_t op = {
2221 .vector = HYPERVISOR_CALLBACK_VECTOR,
2222 .vcpu = per_cpu(xen_vcpu_id, cpu),
2223 };
2224
2225 rc = HYPERVISOR_hvm_op(HVMOP_set_evtchn_upcall_vector, &op);
2226 if (rc)
2227 return rc;
2228
2229 /* Trick toolstack to think we are enlightened. */
2230 if (!cpu)
2231 rc = xen_set_callback_via(1);
2232
2233 return rc;
2234 }
2235
xen_alloc_callback_vector(void)2236 static __init void xen_alloc_callback_vector(void)
2237 {
2238 if (!xen_have_vector_callback)
2239 return;
2240
2241 pr_info("Xen HVM callback vector for event delivery is enabled\n");
2242 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_xen_hvm_callback);
2243 }
2244 #else
xen_setup_callback_vector(void)2245 void xen_setup_callback_vector(void) {}
xen_init_setup_upcall_vector(void)2246 static inline void xen_init_setup_upcall_vector(void) {}
xen_set_upcall_vector(unsigned int cpu)2247 int xen_set_upcall_vector(unsigned int cpu) {}
xen_alloc_callback_vector(void)2248 static inline void xen_alloc_callback_vector(void) {}
2249 #endif /* CONFIG_XEN_PVHVM */
2250 #endif /* CONFIG_X86 */
2251
2252 bool xen_fifo_events = true;
2253 module_param_named(fifo_events, xen_fifo_events, bool, 0);
2254
xen_evtchn_cpu_prepare(unsigned int cpu)2255 static int xen_evtchn_cpu_prepare(unsigned int cpu)
2256 {
2257 int ret = 0;
2258
2259 xen_cpu_init_eoi(cpu);
2260
2261 if (evtchn_ops->percpu_init)
2262 ret = evtchn_ops->percpu_init(cpu);
2263
2264 return ret;
2265 }
2266
xen_evtchn_cpu_dead(unsigned int cpu)2267 static int xen_evtchn_cpu_dead(unsigned int cpu)
2268 {
2269 int ret = 0;
2270
2271 if (evtchn_ops->percpu_deinit)
2272 ret = evtchn_ops->percpu_deinit(cpu);
2273
2274 return ret;
2275 }
2276
xen_init_IRQ(void)2277 void __init xen_init_IRQ(void)
2278 {
2279 int ret = -EINVAL;
2280 evtchn_port_t evtchn;
2281
2282 if (xen_fifo_events)
2283 ret = xen_evtchn_fifo_init();
2284 if (ret < 0) {
2285 xen_evtchn_2l_init();
2286 xen_fifo_events = false;
2287 }
2288
2289 xen_cpu_init_eoi(smp_processor_id());
2290
2291 cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE,
2292 "xen/evtchn:prepare",
2293 xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead);
2294
2295 evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
2296 sizeof(*evtchn_to_irq), GFP_KERNEL);
2297 BUG_ON(!evtchn_to_irq);
2298
2299 /* No event channels are 'live' right now. */
2300 for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
2301 mask_evtchn(evtchn);
2302
2303 pirq_needs_eoi = pirq_needs_eoi_flag;
2304
2305 #ifdef CONFIG_X86
2306 if (xen_pv_domain()) {
2307 if (xen_initial_domain())
2308 pci_xen_initial_domain();
2309 }
2310 xen_init_setup_upcall_vector();
2311 xen_alloc_callback_vector();
2312
2313
2314 if (xen_hvm_domain()) {
2315 native_init_IRQ();
2316 /* pci_xen_hvm_init must be called after native_init_IRQ so that
2317 * __acpi_register_gsi can point at the right function */
2318 pci_xen_hvm_init();
2319 } else {
2320 int rc;
2321 struct physdev_pirq_eoi_gmfn eoi_gmfn;
2322
2323 pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
2324 eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map);
2325 rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
2326 if (rc != 0) {
2327 free_page((unsigned long) pirq_eoi_map);
2328 pirq_eoi_map = NULL;
2329 } else
2330 pirq_needs_eoi = pirq_check_eoi_map;
2331 }
2332 #endif
2333 }
2334