Searched refs:GML_48KHZ (Results 1 – 4 of 4) sorted by relevance
156 control_reg = GML_CONVERTER_ENABLE | GML_48KHZ; in load_asic()195 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; in set_sample_rate()
152 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, in load_asic()192 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; in set_sample_rate()
152 control_reg = GML_CONVERTER_ENABLE | GML_48KHZ; in load_asic()258 clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1; in set_sample_rate()
480 #define GML_48KHZ 0x2 macro