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Searched refs:BIT16 (Results 1 – 17 of 17) sorted by relevance

/drivers/staging/rtl8723bs/include/
Drtl8723b_spec.h200 #define IMR_BCNDERR0_8723B BIT16 /* Beacon Queue DMA OK0 */
228 #define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrupt 3 */
Dhal_com_reg.h563 #define RRSR_MCS4 BIT16
663 #define CAM_WRITE BIT16
699 #define IMR_TIMEOUT1 BIT16 /* Timeout interrupt 1 */
746 #define RCR_UC_DATA_EN BIT16 /* Unicast data packet interrupt enable. */
1286 #define SDIO_HIMR_BCNERLY_INT_MSK BIT16
1308 #define SDIO_HISR_BCNERLY_INT BIT16
1377 #define BT_HWPDN_EN BIT16 /* Enable GPIO[11] as BT HW PDn source */
Dosdep_service.h33 #define BIT16 0x00010000 macro
Drtw_mlme_ext.h61 #define DYNAMIC_MAC_EDCA_TURBO BIT16/* ODM_MAC_EDCA_TURBO */
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h179 #define CAM_CM_SecCAMWE BIT16
194 #define CAM_WRITE BIT16
377 #define RRSR_MCS4 BIT16
Drtl_cam.c110 TargetCommand |= BIT31|BIT16; in rtl92e_set_key()
/drivers/staging/rtl8723bs/hal/
DHal8723BReg.h389 #define IMR_BCNDERR0_8723B BIT16 /* Beacon Queue DMA OK0 */
417 #define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrupt 3 */
Dodm.c723 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); in ODM_TXPowerTrackingCheck()
Dodm.h382 ODM_MAC_EDCA_TURBO = BIT16,
Dhal_com.c1089 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); in rtw_bb_rf_gain_offset()
/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h47 #define BIT16 0x00010000 macro
/drivers/staging/rtl8192e/
Drtl819x_Qos.h26 #define BIT16 0x00010000 macro
/drivers/scsi/
Ddc395x.h60 #define BIT16 0x00010000 macro
/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h374 #define RRSR_MCS4 BIT16
/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dreg.h2428 #define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16
/drivers/scsi/lpfc/
Dlpfc_hw4.h785 #define LPFC_SLI4_INTR16 BIT16
/drivers/tty/
Dsynclink_gt.c2286 if (gsr & (BIT16 << (i*2))) in slgt_interrupt()