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Searched refs:DisplayWatermark (Results 1 – 24 of 24) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/inc/
Dsmu7_fusion.h98 uint8_t DisplayWatermark; member
177 uint8_t DisplayWatermark; member
209 uint8_t DisplayWatermark; member
Dsmu71_discrete.h65 uint8_t DisplayWatermark; member
83 uint8_t DisplayWatermark; member
135 uint8_t DisplayWatermark; member
225 uint8_t DisplayWatermark; member
436 uint8_t DisplayWatermark; member
Dsmu7_discrete.h121 uint8_t DisplayWatermark; member
141 uint8_t DisplayWatermark; member
193 uint8_t DisplayWatermark; member
274 uint8_t DisplayWatermark; member
Dsmu72_discrete.h63 uint8_t DisplayWatermark; member
79 uint8_t DisplayWatermark; member
127 uint8_t DisplayWatermark; member
203 uint8_t DisplayWatermark; member
438 uint8_t DisplayWatermark; member
Dsmu73_discrete.h61 uint8_t DisplayWatermark; member
77 uint8_t DisplayWatermark; member
121 uint8_t DisplayWatermark; member
196 uint8_t DisplayWatermark; member
432 uint8_t DisplayWatermark; member
Dsmu74_discrete.h110 uint8_t DisplayWatermark; member
150 uint8_t DisplayWatermark; member
214 uint8_t DisplayWatermark; member
293 …uint8_t DisplayWatermark[SMU74_MAX_LEVELS_MEMORY][SMU74_MAX_LEVELS_GRA… member
Dsmu75_discrete.h115 uint8_t DisplayWatermark; member
155 uint8_t DisplayWatermark; member
229 uint8_t DisplayWatermark; member
298 …uint8_t DisplayWatermark [SMU75_MAX_LEVELS_MEMORY][SMU75_MAX_LE… member
Dsmu71.h167 uint8_t DisplayWatermark; member
Dsmu73.h249 uint8_t DisplayWatermark; member
Dsmu72.h251 uint8_t DisplayWatermark; member
Dsmu75.h212 uint8_t DisplayWatermark; member
Dsmu74.h278 uint8_t DisplayWatermark; member
/drivers/gpu/drm/radeon/
Dsmu7_fusion.h98 uint8_t DisplayWatermark; member
177 uint8_t DisplayWatermark; member
209 uint8_t DisplayWatermark; member
Dsmu7_discrete.h121 uint8_t DisplayWatermark; member
141 uint8_t DisplayWatermark; member
193 uint8_t DisplayWatermark; member
274 uint8_t DisplayWatermark; member
Dci_dpm.c2888 memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_single_memory_level()
2980 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
3220 graphic_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_single_graphic_level()
3260 pi->smc_state_table.GraphicsLevel[i].DisplayWatermark = in ci_populate_all_graphic_levels()
3323 pi->smc_state_table.MemoryLevel[dpm_table->mclk_table.count - 1].DisplayWatermark = in ci_populate_all_memory_levels()
Dkv_dpm.c2140 pi->graphics_level[i].DisplayWatermark = (i == pi->highest_valid) ? 1 : 0; in kv_calculate_dpm_settings()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dfiji_smumgr.c984 level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_single_graphic_level()
1038 levels[dpm_table->sclk_table.count - 1].DisplayWatermark = in fiji_populate_all_graphic_levels()
1193 mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_single_memory_level()
1261 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in fiji_populate_all_memory_levels()
1340 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_smc_acpi_level()
Diceland_smumgr.c941 graphic_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in iceland_populate_single_graphic_level()
997 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in iceland_populate_all_graphic_levels()
1280 memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in iceland_populate_single_memory_level()
1385 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in iceland_populate_all_memory_levels()
1458 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in iceland_populate_smc_acpi_level()
Dci_smumgr.c455 level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_single_graphic_level()
496 smu_data->smc_state_table.GraphicsLevel[i].DisplayWatermark = in ci_populate_all_graphic_levels()
1235 memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_single_memory_level()
1342 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in ci_populate_all_memory_levels()
1413 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
Dtonga_smumgr.c668 graphic_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in tonga_populate_single_graphic_level()
727 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in tonga_populate_all_graphic_levels()
1014 memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in tonga_populate_single_memory_level()
1133 …smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISP… in tonga_populate_all_memory_levels()
1207 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in tonga_populate_smc_acpi_level()
Dvegam_smumgr.c1012 mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in vegam_populate_single_memory_level()
1076 levels[dpm_table->mclk_table.count - 1].DisplayWatermark = in vegam_populate_all_memory_levels()
Dpolaris10_smumgr.c1186 mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in polaris10_populate_single_memory_level()
1231 levels[i].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH; in polaris10_populate_all_memory_levels()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.c5347 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k].wm_set_id; in smu7_set_watermarks_for_clocks_ranges()
5353 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k - 1].wm_set_id); in smu7_set_watermarks_for_clocks_ranges()
5358 smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable, DisplayWatermark), in smu7_set_watermarks_for_clocks_ranges()
5359 (uint8_t *)table->DisplayWatermark, in smu7_set_watermarks_for_clocks_ranges()
/drivers/gpu/drm/amd/pm/legacy-dpm/
Dkv_dpm.c2412 pi->graphics_level[i].DisplayWatermark = (i == pi->highest_valid) ? 1 : 0; in kv_calculate_dpm_settings()