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Searched refs:HDR_ENDIANNESS (Results 1 – 8 of 8) sorted by relevance

/drivers/net/ipa/reg/
Dipa_reg-v3.1.c251 [HDR_ENDIANNESS] = BIT(0),
Dipa_reg-v3.5.1.c262 [HDR_ENDIANNESS] = BIT(0),
Dipa_reg-v4.2.c285 [HDR_ENDIANNESS] = BIT(0),
Dipa_reg-v4.5.c331 [HDR_ENDIANNESS] = BIT(0),
Dipa_reg-v4.11.c311 [HDR_ENDIANNESS] = BIT(0),
Dipa_reg-v4.9.c308 [HDR_ENDIANNESS] = BIT(0),
/drivers/net/ipa/
Dipa_reg.h409 HDR_ENDIANNESS, enumerator
Dipa_endpoint.c692 val |= ipa_reg_bit(reg, HDR_ENDIANNESS); /* big endian */ in ipa_endpoint_init_hdr_ext()