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Searched refs:MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_tc_phy_regs.h180 #define MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK (0x3 << 14) macro
Dintel_dpll_mgr.c3456 MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK | in mg_pll_get_hw_state()
3519 MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK | in dkl_pll_get_hw_state()
3700 val &= ~(MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK | in icl_mg_pll_write()
3750 val &= ~(MG_CLKTOP2_HSCLKCTL_TLINEDRV_CLKSEL_MASK | in dkl_pll_write()