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Searched refs:UVD_CGC_GATE__RBC_MASK (Results 1 – 20 of 20) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c646 UVD_CGC_GATE__RBC_MASK |
678 UVD_CGC_GATE__RBC_MASK |
1302 UVD_CGC_GATE__RBC_MASK | in uvd_v6_0_enable_clock_gating()
1391 UVD_CGC_GATE__RBC_MASK |
Duvd_v5_0.c646 UVD_CGC_GATE__RBC_MASK | in uvd_v5_0_enable_clock_gating()
733 UVD_CGC_GATE__RBC_MASK |
Duvd_v7_0.c1675 UVD_CGC_GATE__RBC_MASK |
Dvcn_v4_0.c657 | UVD_CGC_GATE__RBC_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_0.c509 | UVD_CGC_GATE__RBC_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v1_0.c484 | UVD_CGC_GATE__RBC_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c576 | UVD_CGC_GATE__RBC_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c714 | UVD_CGC_GATE__RBC_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h401 #define UVD_CGC_GATE__RBC_MASK … macro
Duvd_4_2_sh_mask.h131 #define UVD_CGC_GATE__RBC_MASK 0x10 macro
Duvd_3_1_sh_mask.h131 #define UVD_CGC_GATE__RBC_MASK 0x10 macro
Duvd_4_0_sh_mask.h94 #define UVD_CGC_GATE__RBC_MASK 0x00000010L macro
Duvd_5_0_sh_mask.h143 #define UVD_CGC_GATE__RBC_MASK 0x10 macro
Duvd_6_0_sh_mask.h145 #define UVD_CGC_GATE__RBC_MASK 0x10 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h829 #define UVD_CGC_GATE__RBC_MASK … macro
Dvcn_2_5_sh_mask.h1899 #define UVD_CGC_GATE__RBC_MASK … macro
Dvcn_2_0_0_sh_mask.h1848 #define UVD_CGC_GATE__RBC_MASK … macro
Dvcn_2_6_0_sh_mask.h3570 #define UVD_CGC_GATE__RBC_MASK … macro
Dvcn_3_0_0_sh_mask.h2629 #define UVD_CGC_GATE__RBC_MASK … macro
Dvcn_4_0_0_sh_mask.h64 #define UVD_CGC_GATE__RBC_MASK … macro