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Searched refs:UVD_SUVD_CGC_GATE__SDB_MASK (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c665 UVD_SUVD_CGC_GATE__SDB_MASK |
698 UVD_SUVD_CGC_GATE__SDB_MASK |
1288 UVD_SUVD_CGC_GATE__SDB_MASK | in uvd_v6_0_enable_clock_gating()
1413 UVD_SUVD_CGC_GATE__SDB_MASK;
Duvd_v5_0.c640 UVD_SUVD_CGC_GATE__SDB_MASK; in uvd_v5_0_enable_clock_gating()
753 UVD_SUVD_CGC_GATE__SDB_MASK;
Duvd_v7_0.c1624 UVD_SUVD_CGC_GATE__SDB_MASK;
1697 UVD_SUVD_CGC_GATE__SDB_MASK;
Dvcn_v4_0.c705 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v4_0_disable_clock_gating()
Dvcn_v2_0.c556 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v1_0.c531 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c626 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v3_0.c763 | UVD_SUVD_CGC_GATE__SDB_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h230 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
Duvd_5_0_sh_mask.h731 #define UVD_SUVD_CGC_GATE__SDB_MASK 0x10 macro
Duvd_6_0_sh_mask.h733 #define UVD_SUVD_CGC_GATE__SDB_MASK 0x10 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h458 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
Dvcn_2_5_sh_mask.h2087 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
Dvcn_2_0_0_sh_mask.h3213 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
Dvcn_2_6_0_sh_mask.h3758 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
Dvcn_3_0_0_sh_mask.h2823 #define UVD_SUVD_CGC_GATE__SDB_MASK macro
Dvcn_4_0_0_sh_mask.h1340 #define UVD_SUVD_CGC_GATE__SDB_MASK macro