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Searched refs:UVD_VCPU_CNTL__BLK_RST_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c891 tmp |= UVD_VCPU_CNTL__CLK_EN_MASK | UVD_VCPU_CNTL__BLK_RST_MASK; in vcn_v4_0_start_dpg_mode()
1086 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v4_0_start()
1113 UVD_VCPU_CNTL__BLK_RST_MASK, in vcn_v4_0_start()
1114 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v4_0_start()
1117 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v4_0_start()
1455 UVD_VCPU_CNTL__BLK_RST_MASK, in vcn_v4_0_stop()
1456 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v4_0_stop()
Dvcn_v2_5.c797 tmp |= UVD_VCPU_CNTL__BLK_RST_MASK; in vcn_v2_5_start_dpg_mode()
1017 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v2_5_start()
1037 UVD_VCPU_CNTL__BLK_RST_MASK, in vcn_v2_5_start()
1038 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v2_5_start()
1041 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v2_5_start()
1378 UVD_VCPU_CNTL__BLK_RST_MASK, in vcn_v2_5_stop()
1379 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v2_5_stop()
Dvcn_v3_0.c963 tmp |= UVD_VCPU_CNTL__BLK_RST_MASK; in vcn_v3_0_start_dpg_mode()
1185 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v3_0_start()
1202 UVD_VCPU_CNTL__BLK_RST_MASK, in vcn_v3_0_start()
1203 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v3_0_start()
1206 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v3_0_start()
1565 UVD_VCPU_CNTL__BLK_RST_MASK, in vcn_v3_0_stop()
1566 ~UVD_VCPU_CNTL__BLK_RST_MASK); in vcn_v3_0_stop()
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2765 #define UVD_VCPU_CNTL__BLK_RST_MASK … macro
Dvcn_2_6_0_sh_mask.h118 #define UVD_VCPU_CNTL__BLK_RST_MASK … macro
Dvcn_3_0_0_sh_mask.h3824 #define UVD_VCPU_CNTL__BLK_RST_MASK … macro
Dvcn_4_0_0_sh_mask.h4072 #define UVD_VCPU_CNTL__BLK_RST_MASK … macro