| /drivers/gpu/drm/msm/ |
| D | msm_gem_vma.c | 15 struct msm_gem_address_space *aspace = container_of(kref, in msm_gem_address_space_destroy() local
18 drm_mm_takedown(&aspace->mm); in msm_gem_address_space_destroy()
19 if (aspace->mmu) in msm_gem_address_space_destroy()
20 aspace->mmu->funcs->destroy(aspace->mmu); in msm_gem_address_space_destroy()
21 put_pid(aspace->pid); in msm_gem_address_space_destroy()
22 kfree(aspace); in msm_gem_address_space_destroy()
26 void msm_gem_address_space_put(struct msm_gem_address_space *aspace) in msm_gem_address_space_put() argument
28 if (aspace) in msm_gem_address_space_put()
29 kref_put(&aspace->kref, msm_gem_address_space_destroy); in msm_gem_address_space_put()
33 msm_gem_address_space_get(struct msm_gem_address_space *aspace) in msm_gem_address_space_get() argument
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| D | msm_gem.h | 50 msm_gem_address_space_get(struct msm_gem_address_space *aspace);
52 void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
63 struct msm_gem_address_space *aspace; member
72 int msm_gem_init_vma(struct msm_gem_address_space *aspace,
76 void msm_gem_purge_vma(struct msm_gem_address_space *aspace,
80 int msm_gem_map_vma(struct msm_gem_address_space *aspace,
83 void msm_gem_close_vma(struct msm_gem_address_space *aspace,
128 struct msm_gem_address_space *aspace);
130 struct msm_gem_address_space *aspace, uint64_t *iova);
132 struct msm_gem_address_space *aspace, uint64_t iova);
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| D | msm_gem.c | 305 struct msm_gem_address_space *aspace) in add_vma() argument
316 vma->aspace = aspace; in add_vma()
324 struct msm_gem_address_space *aspace) in lookup_vma() argument
332 if (vma->aspace == aspace) in lookup_vma()
363 if (vma->aspace) { in put_iova_spaces()
364 msm_gem_purge_vma(vma->aspace, vma); in put_iova_spaces()
366 msm_gem_close_vma(vma->aspace, vma); in put_iova_spaces()
386 struct msm_gem_address_space *aspace, in get_vma_locked() argument
393 vma = lookup_vma(obj, aspace); in get_vma_locked()
398 vma = add_vma(obj, aspace); in get_vma_locked()
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| D | msm_gpu.c | 375 if (submit->aspace) in recover_worker()
376 submit->aspace->faults++; in recover_worker()
485 gpu->aspace->mmu->funcs->resume_translation(gpu->aspace->mmu); in fault_worker()
829 struct msm_gem_address_space *aspace = NULL; in msm_gpu_create_private_address_space() local
838 aspace = gpu->funcs->create_private_address_space(gpu); in msm_gpu_create_private_address_space()
839 if (!IS_ERR(aspace)) in msm_gpu_create_private_address_space()
840 aspace->pid = get_pid(task_pid(task)); in msm_gpu_create_private_address_space()
843 if (IS_ERR_OR_NULL(aspace)) in msm_gpu_create_private_address_space()
844 aspace = msm_gem_address_space_get(gpu->aspace); in msm_gpu_create_private_address_space()
846 return aspace; in msm_gpu_create_private_address_space()
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| D | msm_fb.c | 79 struct msm_gem_address_space *aspace, in msm_framebuffer_prepare() argument
91 ret = msm_gem_get_and_pin_iova(fb->obj[i], aspace, &msm_fb->iova[i]); in msm_framebuffer_prepare()
102 struct msm_gem_address_space *aspace, in msm_framebuffer_cleanup() argument
112 msm_gem_unpin_iova(fb->obj[i], aspace); in msm_framebuffer_cleanup()
119 struct msm_gem_address_space *aspace, int plane) in msm_framebuffer_iova() argument
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| D | msm_drv.c | 281 struct msm_gem_address_space *aspace; in msm_kms_init_aspace() local
308 aspace = msm_gem_address_space_create(mmu, "mdp_kms", in msm_kms_init_aspace()
310 if (IS_ERR(aspace)) in msm_kms_init_aspace()
313 return aspace; in msm_kms_init_aspace()
609 ctx->aspace = msm_gpu_create_private_address_space(priv->gpu, current); in context_init()
811 return msm_gem_get_iova(obj, ctx->aspace, iova); in msm_ioctl_gem_info_iova()
825 if (priv->gpu->aspace == ctx->aspace) in msm_ioctl_gem_info_set_iova()
831 return msm_gem_set_iova(obj, ctx->aspace, iova); in msm_ioctl_gem_info_set_iova()
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| D | msm_ringbuffer.c | 78 gpu->aspace, &ring->bo, &ring->iova); in msm_ringbuffer_new()
129 msm_gem_kernel_put(ring->bo, ring->gpu->aspace); in msm_ringbuffer_destroy()
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| /drivers/staging/vme_user/ |
| D | vme_fake.c | 48 u32 aspace; member
56 u32 aspace; member
156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument
168 switch (aspace) { in fake_slave_set()
212 bridge->slaves[i].aspace = aspace; in fake_slave_set()
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument
240 *aspace = bridge->slaves[i].aspace; in fake_slave_get()
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
296 switch (aspace) { in fake_master_set()
320 bridge->masters[i].aspace = aspace; in fake_master_set()
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| D | vme.c | 167 u32 aspace, cycle, dwidth; in vme_get_size() local
172 &aspace, &cycle, &dwidth); in vme_get_size()
179 &buf_base, &aspace, &cycle); in vme_get_size()
193 int vme_check_window(u32 aspace, unsigned long long vme_base, in vme_check_window() argument
201 switch (aspace) { in vme_check_window()
363 dma_addr_t buf_base, u32 aspace, u32 cycle) in vme_slave_set() argument
381 if (!(((image->address_attr & aspace) == aspace) && in vme_slave_set()
387 retval = vme_check_window(aspace, vme_base, size); in vme_slave_set()
392 aspace, cycle); in vme_slave_set()
413 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in vme_slave_get() argument
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| D | vme_tsi148.c | 469 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
485 switch (aspace) { in tsi148_slave_set()
612 dma_addr_t *pci_base, u32 *aspace, u32 *cycle) in tsi148_slave_get() argument
650 *aspace = 0; in tsi148_slave_get()
658 *aspace |= VME_A16; in tsi148_slave_get()
662 *aspace |= VME_A24; in tsi148_slave_get()
666 *aspace |= VME_A32; in tsi148_slave_get()
670 *aspace |= VME_A64; in tsi148_slave_get()
801 unsigned long long vme_base, unsigned long long size, u32 aspace, in tsi148_master_set() argument
953 switch (aspace) { in tsi148_master_set()
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| D | vme_bridge.h | 49 u32 aspace; member
86 u32 aspace; /* Address space of error window*/ member
186 struct vme_bridge *bridge, u32 aspace,
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| D | vme_user.h | 14 __u32 aspace; /* Address Space */ member
36 __u32 aspace; /* Address Space */ member
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| /drivers/gpu/drm/msm/disp/mdp4/ |
| D | mdp4_kms.c | 127 struct msm_gem_address_space *aspace = kms->aspace; in mdp4_destroy() local
130 msm_gem_unpin_iova(mdp4_kms->blank_cursor_bo, kms->aspace); in mdp4_destroy()
133 if (aspace) { in mdp4_destroy()
134 aspace->mmu->funcs->detach(aspace->mmu); in mdp4_destroy()
135 msm_gem_address_space_put(aspace); in mdp4_destroy()
391 struct msm_gem_address_space *aspace; in mdp4_kms_init() local
506 aspace = msm_gem_address_space_create(mmu, in mdp4_kms_init()
509 if (IS_ERR(aspace)) { in mdp4_kms_init()
512 ret = PTR_ERR(aspace); in mdp4_kms_init()
516 kms->aspace = aspace; in mdp4_kms_init()
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| D | mdp4_plane.c | 106 return msm_framebuffer_prepare(new_state->fb, kms->aspace, false); in mdp4_plane_prepare_fb()
121 msm_framebuffer_cleanup(fb, kms->aspace, false); in mdp4_plane_cleanup_fb()
172 msm_framebuffer_iova(fb, kms->aspace, 0)); in mdp4_plane_set_scanout()
174 msm_framebuffer_iova(fb, kms->aspace, 1)); in mdp4_plane_set_scanout()
176 msm_framebuffer_iova(fb, kms->aspace, 2)); in mdp4_plane_set_scanout()
178 msm_framebuffer_iova(fb, kms->aspace, 3)); in mdp4_plane_set_scanout()
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| /drivers/gpu/drm/msm/adreno/ |
| D | a5xx_preempt.c | 232 MSM_BO_WC | MSM_BO_MAP_PRIV, gpu->aspace, &bo, &iova); in preempt_init_ring()
240 MSM_BO_WC, gpu->aspace, &counters_bo, &counters_iova); in preempt_init_ring()
242 msm_gem_kernel_put(bo, gpu->aspace); in preempt_init_ring()
273 msm_gem_kernel_put(a5xx_gpu->preempt_bo[i], gpu->aspace); in a5xx_preempt_fini()
274 msm_gem_kernel_put(a5xx_gpu->preempt_counters_bo[i], gpu->aspace); in a5xx_preempt_fini()
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| D | adreno_gpu.c | 205 struct msm_gem_address_space *aspace; in adreno_iommu_create_address_space() local
226 aspace = msm_gem_address_space_create(mmu, "gpu", in adreno_iommu_create_address_space()
229 if (IS_ERR(aspace) && !IS_ERR(mmu)) in adreno_iommu_create_address_space()
232 return aspace; in adreno_iommu_create_address_space()
296 if (ctx->aspace) in adreno_get_param()
297 *value = gpu->global_faults + ctx->aspace->faults; in adreno_get_param()
305 if (ctx->aspace == gpu->aspace) in adreno_get_param()
307 *value = ctx->aspace->va_start; in adreno_get_param()
310 if (ctx->aspace == gpu->aspace) in adreno_get_param()
312 *value = ctx->aspace->va_size; in adreno_get_param()
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| D | a2xx_gpu.c | 108 msm_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error); in a2xx_hw_init()
454 struct msm_gem_address_space *aspace; in a2xx_create_address_space() local
456 aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, in a2xx_create_address_space()
459 if (IS_ERR(aspace) && !IS_ERR(mmu)) in a2xx_create_address_space()
462 return aspace; in a2xx_create_address_space()
535 if (!gpu->aspace) { in a2xx_gpu_init()
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| D | a6xx_gmu.c | 1165 msm_gem_kernel_put(gmu->hfi.obj, gmu->aspace); in a6xx_gmu_memory_free()
1166 msm_gem_kernel_put(gmu->debug.obj, gmu->aspace); in a6xx_gmu_memory_free()
1167 msm_gem_kernel_put(gmu->icache.obj, gmu->aspace); in a6xx_gmu_memory_free()
1168 msm_gem_kernel_put(gmu->dcache.obj, gmu->aspace); in a6xx_gmu_memory_free()
1169 msm_gem_kernel_put(gmu->dummy.obj, gmu->aspace); in a6xx_gmu_memory_free()
1170 msm_gem_kernel_put(gmu->log.obj, gmu->aspace); in a6xx_gmu_memory_free()
1172 gmu->aspace->mmu->funcs->detach(gmu->aspace->mmu); in a6xx_gmu_memory_free()
1173 msm_gem_address_space_put(gmu->aspace); in a6xx_gmu_memory_free()
1202 ret = msm_gem_get_and_pin_iova_range(bo->obj, gmu->aspace, &bo->iova, in a6xx_gmu_memory_alloc()
1227 gmu->aspace = msm_gem_address_space_create(mmu, "gmu", 0x0, 0x80000000); in a6xx_gmu_memory_probe()
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| D | a6xx_gpu.c | 113 if (msm_iommu_pagetable_params(ctx->aspace->mmu, &ttbr, &asid)) in a6xx_set_pagetable()
941 msm_gem_unpin_iova(a6xx_gpu->sqe_bo, gpu->aspace); in a6xx_ucode_init()
1165 gpu->aspace, &a6xx_gpu->shadow_bo, in hw_init()
1381 gpu->aspace->mmu->funcs->resume_translation(gpu->aspace->mmu); in a6xx_fault_handler()
1738 msm_gem_unpin_iova(a6xx_gpu->sqe_bo, gpu->aspace); in a6xx_destroy()
1743 msm_gem_unpin_iova(a6xx_gpu->shadow_bo, gpu->aspace); in a6xx_destroy()
1790 struct msm_gem_address_space *aspace; in a6xx_create_address_space() local
1818 aspace = msm_gem_address_space_create(mmu, "gpu", in a6xx_create_address_space()
1821 if (IS_ERR(aspace) && !IS_ERR(mmu)) in a6xx_create_address_space()
1824 return aspace; in a6xx_create_address_space()
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| D | a5xx_gpu.c | 925 gpu->aspace, &a5xx_gpu->shadow_bo, in a5xx_hw_init()
1036 msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace); in a5xx_destroy()
1041 msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace); in a5xx_destroy()
1046 msm_gem_unpin_iova(a5xx_gpu->gpmu_bo, gpu->aspace); in a5xx_destroy()
1051 msm_gem_unpin_iova(a5xx_gpu->shadow_bo, gpu->aspace); in a5xx_destroy()
1446 SZ_1M, MSM_BO_WC, gpu->aspace, in a5xx_crashdumper_init()
1546 msm_gem_kernel_put(dumper.bo, gpu->aspace); in a5xx_gpu_state_get_hlsq_regs()
1554 msm_gem_kernel_put(dumper.bo, gpu->aspace); in a5xx_gpu_state_get_hlsq_regs()
1779 if (gpu->aspace) in a5xx_gpu_init()
1780 msm_mmu_set_fault_handler(gpu->aspace->mmu, gpu, a5xx_fault_handler); in a5xx_gpu_init()
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| D | a5xx_debugfs.c | 119 msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace); in reset_set()
125 msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace); in reset_set()
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| /drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_kms.c | 211 struct msm_gem_address_space *aspace = kms->aspace; in mdp5_kms_destroy() local
220 if (aspace) { in mdp5_kms_destroy()
221 aspace->mmu->funcs->detach(aspace->mmu); in mdp5_kms_destroy()
222 msm_gem_address_space_put(aspace); in mdp5_kms_destroy()
558 struct msm_gem_address_space *aspace; in mdp5_kms_init() local
605 aspace = msm_kms_init_aspace(mdp5_kms->dev); in mdp5_kms_init()
606 if (IS_ERR(aspace)) { in mdp5_kms_init()
607 ret = PTR_ERR(aspace); in mdp5_kms_init()
611 kms->aspace = aspace; in mdp5_kms_init()
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_encoder_phys_wb.c | 588 struct msm_gem_address_space *aspace; in dpu_encoder_phys_wb_prepare_wb_job() local
598 aspace = phys_enc->dpu_kms->base.aspace; in dpu_encoder_phys_wb_prepare_wb_job()
604 ret = msm_framebuffer_prepare(job->fb, aspace, false); in dpu_encoder_phys_wb_prepare_wb_job()
620 ret = dpu_format_populate_layout(aspace, job->fb, &wb_cfg->dest); in dpu_encoder_phys_wb_prepare_wb_job()
647 struct msm_gem_address_space *aspace; in dpu_encoder_phys_wb_cleanup_wb_job() local
652 aspace = phys_enc->dpu_kms->base.aspace; in dpu_encoder_phys_wb_cleanup_wb_job()
654 msm_framebuffer_cleanup(job->fb, aspace, false); in dpu_encoder_phys_wb_cleanup_wb_job()
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| D | dpu_formats.c | 774 struct msm_gem_address_space *aspace, in _dpu_format_populate_addrs_ubwc() argument
786 if (aspace) in _dpu_format_populate_addrs_ubwc()
787 base_addr = msm_framebuffer_iova(fb, aspace, 0); in _dpu_format_populate_addrs_ubwc()
865 struct msm_gem_address_space *aspace, in _dpu_format_populate_addrs_linear() argument
882 if (aspace) in _dpu_format_populate_addrs_linear()
884 msm_framebuffer_iova(fb, aspace, i); in _dpu_format_populate_addrs_linear()
895 struct msm_gem_address_space *aspace, in dpu_format_populate_layout() argument
927 ret = _dpu_format_populate_addrs_ubwc(aspace, fb, layout); in dpu_format_populate_layout()
929 ret = _dpu_format_populate_addrs_linear(aspace, fb, layout); in dpu_format_populate_layout()
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| D | dpu_kms.c | 981 if (!dpu_kms->base.aspace) in _dpu_kms_mmu_destroy()
984 mmu = dpu_kms->base.aspace->mmu; in _dpu_kms_mmu_destroy()
987 msm_gem_address_space_put(dpu_kms->base.aspace); in _dpu_kms_mmu_destroy()
989 dpu_kms->base.aspace = NULL; in _dpu_kms_mmu_destroy()
994 struct msm_gem_address_space *aspace; in _dpu_kms_mmu_init() local
996 aspace = msm_kms_init_aspace(dpu_kms->dev); in _dpu_kms_mmu_init()
997 if (IS_ERR(aspace)) in _dpu_kms_mmu_init()
998 return PTR_ERR(aspace); in _dpu_kms_mmu_init()
1000 dpu_kms->base.aspace = aspace; in _dpu_kms_mmu_init()
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